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AS1530 数据表(PDF) 20 Page - ams AG |
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AS1530 数据表(HTML) 20 Page - ams AG |
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20 / 29 page ![]() www.austriamicrosystems.com Revision 1.02 20 - 29 AS1530/AS1531 Data Sheet - Deta iled Description Reduced Power Mode Reduced power mode is activated using bits PD1 and PD0 (see Table 12). When reduced power mode is asserted, the AS1530/AS1531 completes any conversion in progress and enters reduced power mode. The next start of conversion puts the AS1530/AS1531 into normal operation mode. The 8-bit control byte shifted into the control register determines the next power mode. For example, if the 8-bit control byte contains PD1 = 0 and PD0 = 1, reduced power mode starts immediately after the conversion (see Figure 28). The reduced-power mode achieves the lowest power consumption at speeds close to the maximum sample rate. Figure 29 shows the AS1531 power consumption in reduced-power mode and normal operating mode (see Table 12 on page 19) with the internal reference and maximum clock speed. Figure 28. Reduced-Power Mode Timing Waveforms (AS1531) Note: The clock speed in reduced-power mode should be limited to 4.8MHz. Full power-down mode may provide increased power savings in applications where the devices are inactive for long periods of time, where intermit- tent bursts of high-speed conversions are required. Figure 29. Normal Operation and Reduced Power Mode using Internal Reference (AS1531) Full Power-Down Mode Full power-down is activated using bits PD1 and PD0 (see Table 12). Full power-down mode offers the lowest power consumption at up to 1000 conversions per-channel per-second. When full power-down is asserted, the AS1530/ AS1531 completes any conversion in progress and powers down into specified low-quiescent current state. The start of the next conversion puts the AS1530/AS1531 into normal operation mode. The 8-bit control byte shifted into the control register determines the next power mode. For example, if the 8-bit control byte contains PD1 = 0 and PD0 = 0, full power-down mode starts immediately after the conversion (see Figure 30 on page 21) DIN 1 VDD1+VDD2 +VDD3 11 1 1 1 00 0 Reduced- Power Mode Reduced- Power Mode Reduced- Power Mode 2.50V (Always On) 2.2mA 2.2mA 2.2mA 0.4mA 0.4mA 0.4mA REF Normal Mode Conversion Reduced Power Mode Normal Mode Conversion Reduced Power Mode Normal Mode Conversion Reduced Power Mode 0 500 1000 1500 2000 2500 3000 0.001 0.1 10 1000 Sampling Rate (ksps) Reduced Power Mode Normal Operation |
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