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AS1530 数据表(PDF) 5 Page - ams AG |
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AS1530 数据表(HTML) 5 Page - ams AG |
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5 / 29 page ![]() www.austriamicrosystems.com Revision 1.02 5 - 29 AS1530/AS1531 Data Sheet - El ectrical Characte ristics 6 Electrical Characteristics AS1530 Electrical Characteristics VDD1 = VDD2 = VDD3 = +4.5 to +5.5V, COM = GND, fSCLK= 6.4MHz, 50% duty cycle, 16 clocks/conversion cycle (400ksps), external +2.5V at REF, REFADJ = VDD1, TAMB = TMIN to TMAX (unless otherwise specified). Typ values at TAMB = +25ºC. Table 3. AS1530 Electrical Characteristics Symbol Parameter Conditions Min Typ Max Units DC Accuracy 1 Resolution 12 Bits INL Relative Accuracy 2 -1 +1 LSB DNL Differential Nonlinearity No missing codes over temperature -1 +1 LSB Offset Error -6 +6 LSB Gain Error 3 -6 +6 LSB Gain-Error Temperature Coefficient ±1.6 ppm/ °C Channel-to-Channel Offset Error Matching ±0.2 LSB Dynamic Specifications: 100kHz sinewave input, 2.5Vp-p, 400ksps, 6.4MHz clock, bit RANGE (page 15) = 0, pseudo-differential input mode SINAD Signal-to-Noise plus Distortion Ratio 70 dB THD Total Harmonic Distortion Up to the 5th harmonic -82 dB SFDR Spurious-Free Dynamic Range 83 dB IMD Intermodulation Distortion fIN1 = 99kHz, fIN2 = 102kHz 76 dB Channel-to-Channel Crosstalk 4 fIN = 200kHz, VIN = 2.5Vp-p -85 dB Full-Power Bandwidth -3dB point 6 MHz Full-Linear Bandwidth SINAD > 68dB 450 kHz Conversion Rate tCONV Conversion Time 5 2.5 µs tACQ Track/Hold Acquisition Time 390 ns tAD Aperture Delay 7 ns tAJ Aperture Jitter <50 ps fSCLK Serial Clock Frequency 0.5 6.4 MHz Duty Cycle 40 60 % Analog Inputs: CH0:CH7, COM VCHx - VCHy (COM) Input Voltage Range: Single- Ended, Pseudo-Differential, and Differential 6 Bit RANGE (page 15) = 1 0 VREF V Bit RANGE (page 15) = 0 -VREF /2 +VREF /2 Multiplexer Leakage Current On/off leakage current, VCHx = 0 or VDD1 -1 ±0.001 +1 µA Input Capacitance 18 pF Internal Reference VREF REF Output Voltage TAMB = +25ºC 2.48 2.50 2.52 V REF Short-Circuit Current 30 mA TCVREF REF Output Temperature Coefficient ±25 ppm/ °C Load Regulation 7 0 to 1mA output load 1.2 4.0 mV/ mA CBYPREF Capacitive Bypass at REF 4.7 10 µF |
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