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AS3932 数据表(PDF) 13 Page - ams AG |
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AS3932 数据表(HTML) 13 Page - ams AG |
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13 / 33 page ![]() www.austriamicrosystems.com/AS3932 Revision 1.2 13 - 33 AS3932 Data Sheet - Detailed Description 8.2.2.3 ON/OFF mode (Low Power mode 2) All active channels are on at the same time but not for the whole time (time slot T is defined as 1ms). An on-off duty-ratio is defined. This duty ratio is programmable see R4<7:6>. Figure 12. ON/OFF Mode For each of these sub modes it is possible to enable a further feature called Artificial Wake-up. The Artificial Wake-up is a counter based on the used RTC. Three bits define a time window see R8<2:0>. If no activity is seen within this time window the chip will produce an interrupt on the WAKE pin that lasts 128 µs. With this interrupt the microcontroller (µC) can get feedback on the surrounding environment (e.g. read the false wakeup register, see Correlator register R13<7:0>) and/or take actions in order to change the setup. 8.2.3 Preamble Detection / Pattern Correlation The chip can go in to this mode after detecting a LF carrier only if the data correlator function is enabled see R1<1>. The correlator searches first for preamble frequency (constant frequency of Manchester clock defined according to bit-rate transmission) and then for data pattern. If the pattern is matched the wake-up interrupt is displayed on the WAKE output and the chip goes in Data receiving mode. If the pattern fails the internal wake-up (on all active channels) is terminated and no IRQ is produced. 8.2.4 Data Receiving The user can enable this mode allowing the pattern correlation or just on the base of the frequency detection. In this mode the chip can be retained a normal OOK receiver. The data is provided on the DAT pin and in case the Manchester decoder is enabled see R1<3>, the recovered clock is present on the CL_DAT. It is possible to put the chip back to listening mode either with a direct command (CLEAR_WAKE (see Table 12)) or by using the timeout feature. This feature automatically sets the chip back to listening mode after a certain time R7<7:5>. 8.3 System and Block Specification 8.3.1 Register Table Table 6. Register Table 7 6 5 4 3 2 1 0 R0 n.a. ON_OFF MUX_123 EN_A2 EN_A3 EN_A1 PWD R1 ABS_HY AGC_TLIM AGC_UD ATT_ON EN_MANCH EN_PAT2 EN_WPAT EN_RTC R2 S_ABSH W_PAT_T<1:0> Reserved S_WU1<1:0> R3 HY_20m HY_POS FS_SLC<2:0> FS_ENV<2:0> R4 T_OFF<1:0> R_VAL<1:0> GR<3:0> R5 TS2<7:0> R6 TS1<7:0> R7 T_OUT<2:0> T_HBIT<4:0> time time time Channel1 Channel2 Channel3 time Presence of carrier t0 t0+T 2*t0 2*t0+T 3*t0 |
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