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NCP1237 数据表(PDF) 28 Page - ON Semiconductor |
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NCP1237 数据表(HTML) 28 Page - ON Semiconductor |
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28 / 34 page ![]() NCP1237 http://onsemi.com 28 Latch−off Input Figure 26. Latch Detection Schematic − + Latch VOVP S R Q − + VOTP tLatch(OVP) blanking VDD Brown−out Reset Latch Vclamp INTC tLatch(OTP) blanking 1 kW INTC + + Soft−start end The Latch pin is dedicated to the latch−off function. It includes two thresholds that define a working window, between a high latch and a low latch. Within these 2 thresholds; the controller is allowed to run; but as soon as either the low or the high threshold is crossed, the controller is latched off. The lower threshold is intended to be used with an NTC thermistor, with the internal current source INTC providing the necessary bias current. An active clamp prevents the voltage from reaching the high threshold if it is only pulled up by the ILatch current. To reach the high threshold, the pullup current has to be higher than the pulldown capability of the clamp (typically 1.5 mA at VOVP). To avoid any false triggering, noise spikes shorter than tLatch(OVP) or tLatch(OTP) respectively are blanked, and only longer events can actually latch the controller. Reset occurs when a brown−out condition is detected or the VCC is cycled down to a VCC(reset), which in a real application can only happen if the power supply is unplugged from the AC line. Upon startup, the internal references take some time before reaching their nominal values; and one of the comparators could toggle inadvertantly. Therefore the internal logic ignores the latch signal before the controller is ready to start. Once VCC reaches VCC(on), the latch pin High latch state is enabled and the DRV switching starts only if it is allowed; whereas the Low latch (typically sensing an overtemperature) is taken into account only after the soft−start is finished. In addition, the NTC current is doubled during the soft−start period, to speed up the charging of the Latch pin capacitor. |
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