AD5175

Rev. 0 | Page 7 of 20

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

A

W

RESET

10

9

8

SCL

7

5

EXT_CAP

SDA

6

GND

AD5175

TOP VIEW

(Not to Scale)

ADDR

ADDR

2

A

3

W

4

RESET

10

9

8

SCL

7

5

EXT_CAP

SDA

6 GND

AD5175

(EXPOSED

PAD)*

Figure 4. MSOP Pin Configuration

Figure 5. LFCSP Pin Configuration

Table 5. Pin Function Descriptions

Pin No.

Mnemonic

Description

1

Positive Power Supply. Decouple this pin with 0.1 μF ceramic capacitors and 10 μF capacitors.

2

A

3

W

4

Negative Supply. Connect to 0 V for single-supply applications. Decouple this pin with 0.1 μF ceramic capacitors

and 10 μF capacitors.

5

EXT_CAP

rating of ≥7 V.

6

GND

Ground Pin, Logic Ground Reference.

7

RESET

Hardware Reset Pin. Refreshes the RDAC register with the contents of the 50-TP memory register. Factory

default loads midscale until the first 50-TP wiper memory location is programmed. RESET is active low. Tie RESET

8

SDA

Serial Data Line. This pin is used in conjunction with the SCL line to clock data into or out of the 16-bit input

registers. It is a bidirectional, open-drain data line that should be pulled to the supply with an external

pull-up resistor.

9

SCL

Serial Clock Line. This pin is used in conjunction with the SDA line to clock data into or out of the 16-bit

input registers.

10

ADDR

Tristate Address Input. Sets the two least significant bits (Bit A1, Bit A0) of the 7-bit slave address (see Table 6).

EPAD

Exposed Pad