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WM8141CFT/V 数据表(PDF) 10 Page - Wolfson Microelectronics plc |
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WM8141CFT/V 数据表(HTML) 10 Page - Wolfson Microelectronics plc |
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10 / 31 page ![]() WM8141 Production Data WOLFSON MICROELECTRONICS LTD PD Rev 3.0 October 2000 10 PARALLEL INTERFACE STB DNA RNW OP[11:4] Hi-Z Hi-Z ADC DATA OUT ADC DATA OUT REG. DATA OUT ADC DATA OUT t STB t ASU t AH t DSU t DH t STDO t STAO t ADLS t ADLH t ADHS t ADHH t OPD t OPZ ADDRESS IN DATA IN Figure 5 Parallel Interface Diagram Test Conditions AVDD = DVDD1 = DVDD2 = 4.75 to 5.25V, AGND = DGND = 0V, TA = 0 to 70 °C, MCLK = 12MHz unless otherwise stated PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS RNW low to OP[11:4] tri-state. tOPZ 20 ns Address set-up time to STB low tASU 0ns DNA low set-up time to STB low tADLS 10 ns Strobe low time tSTB 50 ns Address hold time from STB high tAH 10 ns DNA low hold time from STB high tADLH 10 ns Data set-up time to STB low tDSU 0ns DNA high set-up time to STB low tADHS 10 ns Data hold time from STB high tDH 10 ns Data high hold time from STB high tADHH 10 ns RNW high to OP[11:4] output tOPD 35 ns Data output propagation delay from STB low tSTDO 35 ns ADC data out propagation delay from STB high tSTAO 35 ns Note: Parameters are measured at 50% of the rising/falling edge. |
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