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WM8728 数据表(PDF) 8 Page - Wolfson Microelectronics plc |
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WM8728 数据表(HTML) 8 Page - Wolfson Microelectronics plc |
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8 / 28 page ![]() WM8728 Product Preview WOLFSON MICROELECTRONICS LTD PP Rev 1.2 April 2001 8 DSD AUDIO BIPHASE INTERFACE MCLK DIN/LRCIN D0 D1 D1 D2 D2 t BCY t BCH t BCL t PH t SU t HD t MCL t MCH t MCY BCKIN Figure 4 Biphase DSD Timing Requirements Test Conditions AVDD, DVDD = 5V, AGND = 0V, DGND = 0V, TA = +25 oC, fs = 48kHz, MCLK = 256fs unless otherwise stated. PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT Audio Data Input Timing Information BCKIN cycle time tBCY 162.8 ns BCKIN pulse width high tBCH 80 81.4 ns BCKIN pulse width low tBCL 80 81.4 ns MCLK cycle time tMCY 325.5 ns MCLK pulse width high tMCH 160 162.8 ns MCLK pulse width low tMCL 160 162.8 ns Phase shift between BCKIN and MCLK tPH 20 ns Data setup time to BCKIN falling edge tSU 10 ns Data hold time to BCKIN rising edge tHD 10 ns |
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