ADL5902ACPZ-R7 datasheet(21/28 Pages) AD

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ADL5902

Rev. 0 | Page 21 of 28

BIAS AND POWER-

DOWN CONTROL

LINEAR-IN-dB VGA

(NEGATIVE SLOPE)

IDET

26pF

ADL5902

VREF

2.3V

TEMPERATURE

SENSOR

INLO

INHI

VPOS

POS

TEMP

VSET

VOUT

CLPF

COMM

VTGT

VREF

TADJ/PWDN

G = 5

ITGT

10nF

(SEE TABLE 6 AND

FIGURE 46.)

CFILTER

(SEE FIGURE 48.)

RFILTER

Ω

VOUT

Figure 47. Optimizing Setting Time and Residual Ripple

In Figure 47, CLPF is equal to 10 nF. This value was experiment-

ally determined to be the minimum capacitance that ensures

good rms compliance when the ADL5902 is driven by a 1 C

W-CDMA signal (TM1-64). This test was carried out by

starting out with a large capacitance value on the CLPF pin (for

example, 10 µF). The value of VOUT was noted for a fixed input

power level (for example, −10 dBm). The value of CLPF was then

progressively reduced (this can be done with press-down

capacitors) until the value of VOUT started to deviate from its

original value (this indicates that the accuracy of the rms

computation is degrading and that CLPF is getting too small).

Figure 48

shows the resulting rise and fall times (signal is pulsed

between off and −10 dBm) with CLPF equal to 10 nF. A 2 kΩ

resistor is placed in series with the VOUT pin, and the

capacitance from this resistor to ground (CFILTER in Figure 47) is

varied up to 1 µF.

100

10k

100k

100

150

200

250

300

100

CFILTER (nF)

RESIDUAL RIPPLE (V p-p)

10% TO 90% RISE TIME (µs)

90% TO 10% FALL TIME (µs)

Figure 48. Residual Ripple, Rise and Fall Times Using an RC Low-Pass Filter

at VOUT, PIN = 0 dBm at 2.14 GHz

For large values of CFILTER, the fall time is dramatically reduced

compared to Figure 46. This comes at the expense of a moderate

increase in rise time.

As CFILTER is reduced, the fall time flattens out. This is because

the fall time is now dominated by the 10 nF CLPF which is

present throughout the measurement.

Table 6 shows recommended minimum values of CLPF for

popular modulation schemes, using just a single filter capacitor

at the CLPF pin. Using lower capacitor values results in rms

measurement errors. Output response time (10% to 90%) is also

shown. If the output noise shown in Table 6 is unacceptably

high, it can be reduced by

•

Increasing CLPF

•

Adding an RC filter at VOUT, as shown in Figure 47

•

Implementing an averaging algorithm after the ADL5902’s

output voltage has been digitized by an ADC

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