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PCF8564AU/5GE/1 数据表(PDF) 4 Page - NXP Semiconductors

部件名 PCF8564AU/5GE/1
功能描述  Real time clock and calendar
PDF  44 Pages
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制造商  NXP [NXP Semiconductors]
网页  http://www.nxp.com
标志 NXP - NXP Semiconductors

PCF8564AU/5GE/1 数据表(HTML) 4 Page - NXP Semiconductors

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PCF8564A_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 1 — 8 October 2009
4 of 44
NXP Semiconductors
PCF8564A
Real time clock and calendar
7.
Pinning information
7.1 Pinning
7.2 Pin description
[1]
The substrate (rear side of the die) is wired to VSS but should not be electrically contacted.
Viewed from pad side. For mechanical details, see
Figure 27.
Viewed from bump side. For mechanical details, see
Figure 28.
Fig 2.
Pinning diagram of PCF8564AU
Fig 3.
Pinning diagram of PCF8564ACX9
1
2
3
4
5
6
7
8
9
x
y
PCF8564AU
013aaa032
OSCI
OSCO
INT
SDA
CLKOUT
VDD
CLKOE
SCL
VSS
0,0
1
2
3
4
5
6
7
8
9
0,0
x
y
PCF8564ACX
013aaa033
OSCI
OSCO
INT
VSS
SCL
SDA
CLKOUT
VDD
CLKOE
Table 3.
Pin description
Symbol
Pin
Description
OSCI
1
oscillator input
OSCO
2
oscillator output
INT
3
interrupt output, open-drain, active LOW
VSS
4
ground[1]
SDA
5
serial data input and output
SCL
6
serial clock input
CLKOUT
7
clock output, push-pull
VDD
8
supply voltage
CLKOE
9
CLKOUT output enable



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