PCF8564A_1

© NXP B.V. 2009. All rights reserved.

Product data sheet

Rev. 1 — 8 October 2009

6 of 44

NXP Semiconductors

PCF8564A

Real time clock and calendar

8.2 Register organization

Table 4.

Register overview

Bit positions labelled as - are not implemented. Bit positions labelled as N should always be written with logic 0. After reset, all

registers are set according to Table 27.

Address

Register name

Bit

7

6

5

4

3

2

1

0

Control registers

00h

Control_1

TEST1

N

STOP

N

TESTC

N

N

N

01h

Control_2

N

N

N

TI_TP

AF

TF

AIE

TIE

Time and date registers

02h

Seconds

VL

SECONDS (0 to 59)

03h

Minutes

-

MINUTES (0 to 59)

04h

Hours

-

-

HOURS (0 to 23)

05h

Days

-

-

DAYS (1 to 31)

06h

Weekdays

-

----

WEEKDAYS

07h

Months

C

-

-

MONTH (1 to 12)

08h

Years

YEARS (0 to 99)

Alarm registers

09h

Minute_alarm

AE_M

MINUTE_ALARM (0 to 59)

0Ah

Hour_alarm

AE_H

-

HOUR_ALARM (0 to 23)

0Bh

Day_alarm

AE_D

-

DAY_ALARM (1 to 31)

0Ch

Weekday_alarm

AE_W

----

WEEKDAY_ALARM

CLKOUT control register

0Dh

CLKOUT_ctrl

FE

-----FD

Timer registers

0Eh

Timer_ctrl

TE

-----TD

0Fh

Timer

TIMER_VALUE