ADRF6510

Rev. 0 | Page 5 of 28

TIMING DIAGRAMS

WRITE BIT

MSB - 2

LSB + 1

LSB

NOTES

1. THE FIRST DATA BIT DETERMINES WHETHER THE PART IS WRITING TO OR READING FROM THE INTERNAL CORNER FREQUENCY

WORD REGISTER. FOR A WRITE OPERATION, THE FIRST BIT SHOULD BE A LOGIC 1. THE CORNER FREQUENCY WORD BIT IS THEN

REGISTERED INTO THE DATA PIN ON CONSECUTIVE RISING EDGES OF THE CLOCK.

CLK

LE

DATA

MSB – 2

MSB – 1

MSB

Figure 2. Write Mode Timing Diagram

DC

DC

READ BIT

DC

DC

DC

DC

DC

LSB + 1

LSB

CLK

LE

DATA

SDO

NOTES

1. THE FIRST DATA BIT DETERMINES WHETHER THE PART IS WRITING TO OR READING FROM THE INTERNAL CORNER FREQUENCY WORD

REGISTER. FOR A READ OPERATION, THE FIRST BIT SHOULD BE A LOGIC 0. THE CORNER FREQUENCY WORD BIT IS THEN UPDATED AT

THE SDO PIN ON CONSECUTIVE FALLING EDGES OF THE CLOCK.

MSB – 2

MSB – 1

MSB

Figure 3. Read Mode Timing Diagram