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MCP4902-E/ST 数据表(PDF) 7 Page - Microchip Technology

部件名 MCP4902-E/ST
功能描述  8/10/12-Bit Dual Voltage Output Digital-to-Analog Converter with SPI Interface
PDF  48 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

MCP4902-E/ST 数据表(HTML) 7 Page - Microchip Technology

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 2010 Microchip Technology Inc.
DS22250A-page 7
MCP4902/4912/4922
AC CHARACTERISTICS (SPI TIMING SPECIFICATIONS)
FIGURE 1-1:
SPI Input Timing Data.
Electrical Specifications: Unless otherwise indicated, VDD= 2.7V – 5.5V, TA= -40 to +125°C.
Typical values are at +25°C.
Parameters
Sym
Min
Typ
Max
Units
Conditions
Schmitt Trigger High-Level
Input Voltage (All digital input
pins)
VIH
0.7 VDD
——
V
Schmitt Trigger Low-Level
Input Voltage
(All digital input pins)
VIL
——
0.2 VDD
V
Hysteresis of Schmitt Trigger
Inputs
VHYS
—0.05 VDD
—V
Input Leakage Current
ILEAKAGE
-1
1
A
SHDN = LDAC = CS = SDI =
SCK + VREF = VDD or VSS
Digital Pin Capacitance
(All inputs/outputs)
CIN,
COUT
—10
pF
VDD = 5.0V, TA = +25°C,
fCLK = 1 MHz (Note 1)
Clock Frequency
FCLK
——
20
MHz TA = +25°C (Note 1)
Clock High Time
tHI
15
ns
Note 1
Clock Low Time
tLO
15
ns
Note 1
CS Fall to First Rising CLK
Edge
tCSSR
40
ns
Applies only when CS falls with
CLK high. (Note 1)
Data Input Setup Time
tSU
15
ns
Note 1
Data Input Hold Time
tHD
10
ns
Note 1
SCK Rise to CS Rise Hold
Time
tCHS
15
ns
Note 1
CS High Time
tCSH
15
ns
Note 1
LDAC Pulse Width
tLD
100
ns
Note 1
LDAC Setup Time
tLS
40
ns
Note 1
SCK Idle Time before CS Fall
tIDLE
40
ns
Note 1
Note 1:
This parameter is ensured by design and not 100% tested.
CS
SCK
SI
LDAC
tCSSR
tHD
tSU
tLO
tCSH
tCHS
LSb in
MSb in
tIDLE
Mode 1,1
Mode 0,0
tHI
tLD
tLS



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