MCP4902-ESLASHST datasheet(17/48 Pages) MICROCHIP

17 / 48 page

 2010 Microchip Technology Inc.

DS22250A-page 17

MCP4902/4912/4922

3.0

PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 3-1.

TABLE 3-1:

PIN FUNCTION TABLE

3.1

Supply Voltage Pins (VDD, VSS)

VDD is the positive supply voltage input pin. The input

supply voltage is relative to VSS and can range from

2.7V to 5.5V. The power supply at the VDD pin should

be as clean as possible for a good DAC performance.

It is recommended to use an appropriate bypass

capacitor of about 0.1 µF (ceramic) to ground. An

additional 10 µF capacitor (tantalum) in parallel is also

recommended to further attenuate high frequency

noise present in application boards.

VSS is the analog ground pin and the current return path

of the device. The user must connect the VSS pin to a

ground plane through a low-impedance connection. If

an analog ground path is available in the application

Printed Circuit Board (PCB), it is highly recommended

that the VSS pin be tied to the analog ground path or

isolated within an analog ground plane of the circuit

board.

3.2

Chip Select (CS)

CS is the Chip Select input, which requires an active

low signal to enable serial clock and data functions.

3.3

Serial Clock Input (SCK)

SCK is the SPI compatible serial clock input pin.

3.4

Serial Data Input (SDI)

SDI is the SPI compatible serial data input pin.

3.5

Latch DAC Input (LDAC)

LDAC (latch DAC synchronization input) pin is used to

transfer the input latch registers to their corresponding

DAC registers (output latches, VOUT). When this pin is

low, both VOUTA and VOUTB are updated at the same

time with their input register contents. This pin can be

tied to low (VSS) if the VOUT update is desired at the

rising edge of the CS pin. This pin can be driven by an

external control device such as an MCU I/O pin.

3.6

Hardware Shutdown Input (SHDN)

SHDN is the hardware shutdown input pin. When this

pin is low, both DAC channels are shut down. DAC

output is not available during the shutdown.

3.7

Analog Outputs (VOUTA, VOUTB)

VOUTA is the DAC A output pin, and VOUTB is the DAC

B output pin. Each output has its own output amplifier.

The DAC output amplifier of each channel can drive the

output pin with a range of VSS to VDD.

3.8

Voltage Reference Inputs

(VREFA, VREFB)

VREFA is the voltage reference input for DAC channel

A, and VREFB is the reference input for DAC channel B.

The reference on these pins is utilized to set the

reference voltage on the string DAC. The input signal

can range from VSS to VDD. These pins can be tied to

VDD.

Pin No.

Symbol

Function

1VDD

Supply Voltage Input (2.7V to 5.5V)

No Connection

3CS

Chip Select Input

SCK

Serial Clock Input

SDI

Serial Data Input

No Connection

8LDAC

Synchronization Input. This pin is used to transfer DAC settings (Input Registers)

to the output registers (VOUT)

9SHDN

Hardware Shutdown Input

VOUTB

DACB Output

VREFB

DACB Reference Voltage Input (VSS to VDD)

VSS

Ground reference point for all circuitry on the device

VREFA

DACA Reference Voltage Input (VSS to VDD)

VOUTA

DACA Output

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