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IR3521 数据表(PDF) 6 Page - International Rectifier

部件名 IR3521
功能描述  XPHASE3TM AMD SVID CONTROL IC
PDF  45 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  IRF [International Rectifier]
网页  http://www.irf.com
标志 IRF - International Rectifier

IR3521 数据表(HTML) 6 Page - International Rectifier

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IR3521
Page 6
V3.03
RECOMMENDED OPERATING CONDITIONS FOR RELIABLE OPERATION WITH MARGIN
4.75V ≤ VCCL ≤ 7.5V, -0.3V ≤ VOSEN-x ≤ 0.3V, 0
oC ≤ T
J ≤ 100
oC, 7.75 kΩ ≤ ROSC ≤ 50 kΩ, CSS/DELx = 0.1uF
ELECTRICAL CHARACTERISTICS
The electrical characteristics table shows the spread of values guaranteed within the recommended operating conditions (unless
otherwise specified). Typical values (TYP) represent the median values, which are related to 25°C.
PARAMETER
TEST CONDITION
MIN
TYP
MAX
UNIT
SVID Interface
Threshold Increasing
0.8025
0.90
0.9975
V
Threshold Decreasing
570
650
750
mV
SVC & SVD Input Thresholds
Threshold Hysteresis
150
250
400
mV
Bias Current
0V ≤ V(x) ≤ 3.5V, SVD not asserted
-5
0
5
uA
SVD Low Voltage
I(SVD)= 3mA
20
300
mV
SVD Fall Time, CSVD=400 pF
70-30% VDDIO, 1.425V ≤ VDDIO ≤ 1.9V,
1.7MHz operation, Note 1
20
40
160
ns
SVD Fall Time, CSVD=100 pF
3.4MHz operation
20
80
ns
Pulse width input filter
Note 1
10
20
20
<100
ns
PSI_L OUTPUT
Output Voltage
I(PSI_L) = 3mA
150
300
mV
Pull-up Resistance (to VCCL)
6
10
20
kΩ
Oscillator
PHSOUT Frequency
-10%
See
Figure 2
+10%
kHz
ROSC Voltage
0.57
0.600
0.630
V
CLKOUT High Voltage
I(CLKOUT)= -10 mA, measure V(VCCL) –
V(CLKOUT).
1
V
CLKOUT Low Voltage
I(CLKOUT)= 10 mA
1
V
PHSOUT High Voltage
I(PHSOUT)= -1 mA, measure V(VCCL) –
V(PHSOUT)
1
V
PHSOUT Low Voltage
I(PHSOUT)= 1 mA
1
V
PHSIN Threshold Voltage
Compare to V(VCCL)
30
50
70
%
VDRP1 Buffer Amplifier
Input Offset Voltage
V(VDRP1) – V(IIN1), 0.5V ≤ V(IIN) ≤ 3.3V
-8
0
8
mV
Source Current
0.5V ≤ V(IIN1) ≤ 3.3V
2
30
mA
Sink Current
0.5V ≤ V(IIN1) ≤ 3.3V
0.2
0.4
0.6
mA
Unity Gain Bandwidth
Note 1
8
MHz
Slew Rate
Note 1
4.7
V/
s
IIN Bias Current
-2
-0.2
1
A
Remote Sense Differential Amplifiers
Unity Gain Bandwidth
Note 1
3.0
6.4
9.0
MHz
Input Offset Voltage
0.5V≤ V(VOSENx+) - V(VOSENx-) ≤ 1.6V,
Note 2
-3
0
3
mV
Source Current
0.5V≤ V(VOSENx+) - V(VOSENx-) ≤ 1.6V
0.5
1
1.7
mA
Sink Current
0.5V≤ V(VOSENx+) - V(VOSENx-) ≤ 1.6V
2
12
18
mA
Slew Rate
0.5V≤ V(VOSENx+) - V(VOSENx-) ≤ 1.6V
2
4
8
V/us
VOSEN+ Bias Current
TBS V < V(VOSENx+) < 1.6V
30
50
uA
VOSEN- Bias Current
-0.3V ≤ VOSENx- ≤ 0.3V, All VID Codes
30
50
uA
VOSEN+ Input Voltage Range
V(VCCL)=7V
5.5
V
Low Voltage
V(VCCL) =7V
250
mV
High Voltage
V(VCCL) – V(VOUTx)
0.5
1
V



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