AD7441/AD7451

Rev. D | Page 9 of 24

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

SCLK

SDATA

CS

8

7

6

5

AD7441/

AD7451

TOP VIEW

(Not to Scale)

Figure 5. 8-Lead MSOP Pin Configuration

GND

8

7

6

5

AD7441/

AD7451

TOP VIEW

(Not to Scale)

Figure 6. 8-Lead SOT-23 Pin Configuration

Table 5. Pin Function Descriptions

Pin. No.

Mnemonic

Description

MSOP

SOT-23

1

8

applied to this input. The specified reference input is 2.5 V. This pin is decoupled to GND with a capacitor

of at least 0.1 μF.

2

7

Noninverting Analog Input.

3

6

offset to provide a pseudo ground.

4

5

GND

Analog Ground. Ground reference point for all circuitry on the AD7441/AD7451. All analog input signals

and any external reference signal are referred to this GND voltage.

5

4

CS

Chip Select. Active low logic input. This input provides the dual function of initiating a conversion on

the AD7441/AD7451 and framing the serial data transfer.

6

3

SDATA

Serial Data, Logic Output. The conversion result from the AD7441/AD7451 is provided on this output as

a serial data stream. The bits are clocked out on the falling edge of the SCLK input. The data stream of

the AD7451 consists of four leading zeros followed by the 12 bits of conversion data that are provided

MSB first; the data stream of the AD7441 consists of four leading zeros, followed by the 10 bits of con-

version data, followed by two trailing zeros. In both cases, the output coding is straight (natural) binary.

7

2

SCLK

Serial Clock, Logic Input. SCLK provides the serial clock for accessing data from the part. This clock input

is also used as the clock source for the conversion process.

8

1

10 μF tantalum capacitor.