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AD7441BRTZ-R2 数据表(PDF) 15 Page - Analog Devices |
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AD7441BRTZ-R2 数据表(HTML) 15 Page - Analog Devices |
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15 / 24 page ![]() AD7441/AD7451 Rev. D | Page 15 of 24 When no amplifier is used to drive the analog input, it is recommended that the source impedance be limited to low values. The maximum source impedance depends on the amount of total harmonic distortion that can be tolerated. The THD increases as the source impedance increases and performance degrades. Figure 25 shows a graph of THD vs. analog input signal frequency for different source impedances. 0 –100 –90 –80 –70 –60 –50 –40 –30 –10 –20 10k 100k 1M INPUT FREQUENCY (Hz) 200Ω 100Ω 62Ω 10Ω TA = 25°C VDD = 5V Figure 25. THD vs. Analog Input Frequency for Various Source Impedances Figure 26 shows a graph of THD vs. analog input frequency for various supply voltages while sampling at 1 MSPS with an SCLK of 18 MHz. In this case, the source impedance is 10 Ω. –50 –90 –85 –80 –75 –70 –65 –60 –55 10 100 1000 INPUT FREQUENCY (kHz) TA = 25°C VDD = 2.7V VDD = 3.6V VDD = 4.75V VDD = 5.25V Figure 26. THD vs. Analog Input Frequency for Various Supply Voltages DIGITAL INPUTS The digital inputs applied to the AD7441/AD7451 are not limited by the maximum ratings that limit the analog inputs. Instead, the digital inputs applied, that is, CS and SCLK, can go to 7 V and are not restricted by the VDD + 0.3 V limits as on the analog input. The main advantage of the inputs not being restricted to the VDD + 0.3 V limit is that power supply sequencing issues are avoided. If CS or SCLK are applied before VDD, there is no risk of latch-up as there would be on the analog inputs if a signal greater than 0.3 V were applied prior to VDD. REFERENCE An external source is required to supply the reference to the AD7441/AD7451. This reference input can range from 100 mV to VDD. The specified reference is 2.5 V for the power supply range 2.7 V to 5.25 V. The reference input chosen for an appli- cation must never be greater than the power supply. Errors in the reference source result in gain errors in the AD7441/AD7451 transfer function and add to the specified full-scale errors of the part. A capacitor of at least 0.1 μF must be placed on the VREF pin. Suitable reference sources for the AD7441/AD7451 include the AD780 and the ADR421. Figure 27 shows a typical connec- tion diagram for the VREF pin. 1 AD780 NC 8 2 VIN NC 7 3 GND 6 4 TEMP 5 OPSEL TRIM VOUT AD7441/ AD7451* VREF 2.5V NC VDD NC VDD NC = NO CONNECT 10nF 0.1µF 0.1µF 0.1µF *ADDITIONAL PINS OMITTED FOR CLARITY. Figure 27. Typical VREF Connection Diagram for VDD = 5 V |
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