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M95320 数据表(PDF) 31 Page - STMicroelectronics

部件名 M95320
功能描述  32 Kbit serial SPI bus EEPROMs with high-speed clock
PDF  44 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

M95320 数据表(HTML) 31 Page - STMicroelectronics

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M95320, M95320-W, M95320-R
DC and AC parameters
Doc ID 5711 Rev 12
31/44
Table 18.
AC characteristics (M95320-W, device grade 6)
Test conditions specified in Table 9 and Table 11
Symbol
Alt.
Parameter
Min.
Max.
Unit
fC
fSCK
Clock frequency
D.C.
10
MHz
tSLCH
tCSS1 S active setup time
30
ns
tSHCH
tCSS2 S not active setup time
30
ns
tSHSL
tCS
S deselect time
40
ns
tCHSH
tCSH
S active hold time
30
ns
tCHSL
S not active hold time
30
ns
tCH
(1)
1.
tCH + tCL must never be lower than the shortest possible clock period, 1/fC(max).
tCLH
Clock high time
42
ns
tCL
(1)
tCLL
Clock low time
40
ns
tCLCH
(2)
2.
Value guaranteed by characterization, not 100% tested in production.
tRC
Clock rise time
2
µs
tCHCL
(2)
tFC
Clock fall time
2
µs
tDVCH
tDSU
Data in setup time
10
ns
tCHDX
tDH
Data in hold time
10
ns
tHHCH
Clock low hold time after HOLD not active
30
ns
tHLCH
Clock low hold time after HOLD active
30
ns
tCLHL
Clock low set-up time before HOLD active
0
ns
tCLHH
Clock low set-up time before HOLD not active
0
ns
tSHQZ
(2)
tDIS
Output disable time
40
ns
tCLQV
(3)
3.
tCLQV must be compatible with tCL (clock low time): if the SPI bus master offers a Read setup time tSU = 0
ns, tCL can be equal to (or greater than) tCLQV; in all other cases, tCL must be equal to (or greater than)
tCLQV+tSU.
tV
Clock low to output valid
40
ns
tCLQX
tHO
Output hold time
0
ns
tQLQH
(2)
tRO
Output rise time
40
ns
tQHQL
(2)
tFO
Output fall time
40
ns
tHHQV
tLZ
HOLD high to output valid
40
ns
tHLQZ
(2)
tHZ
HOLD low to output high-Z
40
ns
tW
tWC
Write time
5
ms



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