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ADN2526ACPZ-R2 数据表(PDF) 13 Page - Analog Devices |
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ADN2526ACPZ-R2 数据表(HTML) 13 Page - Analog Devices |
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13 / 16 page ![]() ADN2526 Rev. A | Page 13 of 16 CROSSPOINT ADJUSTMENT The optical eye cross point is adjustable between 35% and 65% using the cross point adjust (CPA) control input. The equivalent circuit for the CPA pin is shown in Figure 31. In a default CPA setting, leave CPA unconnected (maintain pin-to-pin compatibil- ity with the ADN2525). The internal bias circuit presents about 1.9 V at the CPA pin and the eye cross point is set to 50%. To set the cross point at various points, apply an external voltage to the CPA pin. 7kΩ 7kΩ 7kΩ VCC CPA Figure 31. Equivalent Circuit for CPA Pin POWER SEQUENCE To ensure reliable operation, the recommended power-up sequence is: the supply rail to ADN2526 first, then the BSET pin, followed by the MSET pin, and, finally, the CPA pin. To turn off the ADN2526, the operation is reversed: shut down CPA first, then MSET, followed by BSET, and, last, the supply rail. POWER CONSUMPTION The power dissipated by the ADN2526 is given by IBIAS V I V VCC P IBIAS SUPPLY MSET × + ⎟ ⎠ ⎞ ⎜ ⎝ ⎛ + × = 13.5 where: VCC is the power supply voltage. VMSET is the voltage applied to the MSET pin. ISUPPLY is the sum of the currents that flow into VCC, IMODP, and IMODN, which are sank by the ADN2526 when VBSET = VMSET = 0 V, expressed in amps (see Table 1). VIBIAS is the average voltage presented on the IBIAS pin. IBIAS is the bias current sank by the ADN2526. Considering VBSET/IBIAS = 10 mV/mA as the conversion factor from VBSET to IBIAS, the dissipated power becomes IBIAS BSET SUPPLY MSET V V I V VCC P × + ⎟ ⎠ ⎞ ⎜ ⎝ ⎛ + × = 10 5 . 13 To ensure long-term reliable operation, the junction tempera- ture of the ADN2526 must not exceed 125°C, as specified in Table 2. For improved heat dissipation, the SFP+ module case can work as a heat sink, as shown in Figure 32. A compact optical module is a complex thermal environment, and calculations of device junction temperature using the package junction-to-ambient thermal resistance (θJA) do not yield accurate results. TTOP TJ TPAD DIE PACKAGE THERMAL COMPOUND MODULE CASE PCB VIAS COPPER PLANE THERMOCOUPLE Figure 32. Typical Optical Module Structure The parameters in Table 6 can be used to estimate the IC junction temperature. Table 6. Definitions Parameter Description Unit TTOP Temperature at the top of the package °C TPAD Temperature at the package exposed paddle °C TJ IC junction temperature °C P Power dissipation W θJ-TOP Thermal resistance from the IC junction to the package top °C/W θJ-PAD Thermal resistance from the IC junction to the package exposed paddle °C/W TTOP and TPAD can be determined by measuring the temperature at points inside the module, as shown in Figure 32. The thermo- couples should be positioned to obtain an accurate measurement of the package top and paddle temperatures. Using the model shown in Figure 33, the junction temperature can be calculated by TJ = ( ) TOP J PAD J TOP J PAD PAD J TOP TOP J PAD J T T P − − − − − − + × + × + × × θ θ θ θ θ θ where: θJ-TOP and θJ-PAD are given in Table 2. P is the power dissipated by the ADN2526. P θJ-TOP TPAD TTOP TTOP θJ-PAD Figure 33. Electrical Model for Thermal Calculations |
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