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LTM4627

4627f

Multiphase Operation

For outputs that demand more than 15A of load current,

multiple LTM4627 devices can be paralleled to provide

more output current without increasing input and output

voltage ripple. The MODE_PLLIN pin allows the LTM4627

to be synchronized to an external clock (between 400kHz

to 800kHz) and the internal phase-locked loop allows the

LTM4627 to lock onto input clock phase as well. The fSET

resistor is selected for normal frequency, then the incoming

clock can synchronize the device over the speciﬁed range.

See Figure 20 for a synchronizing example circuit.

A multiphase power supply signiﬁcantly reduces the

amount of ripple current in both the input and output ca-

pacitors. The RMS input ripple current is reduced by, and

the effective ripple frequency is multiplied by, the number

of phases used (assuming that the input voltage is greater

than the number of phases used times the output voltage).

The output ripple amplitude is also reduced by the number

of phases used. See Application Note 77.

The LTM4627 device is an inherently current mode con-

trolled device, so parallel modules will have good current

sharing. This will balance the thermals in the design. Tie

the COMP and VFB pins of each LTM4627 together to

share the current evenly. Figure 20 shows a schematic of

the parallel design.

Input RMS Ripple Current Cancellation

Application Note 77 provides a detailed explanation of

multiphase operation. The input RMS ripple current can-

cellation mathematical derivations are presented, and a

graph is displayed representing the RMS ripple current

reduction as a function of the number of interleaved phases

(see Figure 2).

PLL, Frequency Adjustment and Synchronization

TheLTM4627switchingfrequencyissetbyaresistor(RfSET)

from the fSET pin to signal ground. A 10μA current (IFREQ)

ﬂowing out of the fSET pin through RfSET develops a voltage

on fSET. RfSET can be calculated as:

RfSET(kΩ)=

FREQ(kHz)

4.5

+ 2kHz

The relationship of fSET voltage to switching frequency is

shown in Figure 3. For low output voltages from 0.8V to

1.5V, 400kHz operation is an optimal frequency for the best

power conversion efﬁciency while maintaining the inductor

current to about 30% to 40% of maximum load current.

For output voltages from 1.8V to 3.0V, 500kHz to 600kHz

is optimal. For output voltages from 3.0V to 5.0V, 750kHz

operation is optimal, but due to the higher ripple current

at 5V operation the output current is limited to 10A.

The LTM4627 can be synchronized from 400kHz to 800kHz

with an input clock that has a high level above 2V and

a low level below 0.8V. The 400kHz low end operation

limit is put in place to limit inductor ripple current. See the

Typical Applications section for synchronization examples.

The LTM4627 minimum on-time is limited to approximately

90ns. Guardband the on-time to 130ns. The on-time can

be calculated as:

tON(MIN)=

FREQ

•

VOUT

VIN

⎛

⎝

⎜

⎞

⎠

⎟

Output Voltage Tracking

Output voltage tracking can be programmed externally

using the TRACK/SS pin. The output can be tracked up and

down with another regulator. The master regulator’s output

is divided down with an external resistor divider that is the

same as the slave regulator’s feedback divider to implement

coincident tracking. The LTM4627 uses an accurate 60.4k

resistor internally for the top feedback resistor. Figure 4

shows an example of coincident tracking.

VOUT(SLAVE) = 1+

60.4k

RTA

⎛

⎝⎜

⎞

⎠⎟

•VTRACK

VTRACK is the track ramp applied to the slave’s track pin.

VTRACK has a control range of 0V to 0.6V, or the internal

reference voltage. When the master’s output is divided

down with the same resistor values used to set the slave’s

output, then the slave will coincident track with the master

until it reaches its ﬁnal value. The master will continue to

APPLICATIONS INFORMATION

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