LTM4627EVPBF datasheet(16/28 Pages) LINER

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LTM4627

4627f

APPLICATIONS INFORMATION

Thermal Considerations and Output Current Derating

The thermal resistances reported in the Pin Conﬁguration

section of the data sheet are consistent with those param-

eters deﬁned by JESD51-9 and are intended for use with

ﬁnite element analysis (FEA) software modeling tools that

leverage the outcome of thermal modeling, simulation,

and correlation to hardware evaluation performed on a

μModule package mounted to a hardware test board—also

deﬁned by JESD51-9 (“Test Boards for Area Array Surface

Mount Package Thermal Measurements”). The motivation

for providing these thermal coefﬁcients in found in JESD

51-12 (“Guidelines for Reporting and Using Electronic

Package Thermal Information”).

Many designers may opt to use laboratory equipment

and a test vehicle such as the demo board to anticipate

the μModule regulator’s thermal performance in their ap-

plication at various electrical and environmental operating

conditions to compliment any FEA activities. Without FEA

software, the thermal resistances reported in the Pin Con-

ﬁguration section are in-and-of themselves not relevant to

providing guidance of thermal performance; instead, the

derating curves provided in the data sheet can be used in

a manner that yields insight and guidance pertaining to

one’s application-usage, and can be adapted to correlate

thermal performance to one’s own application.

The Pin Conﬁguration section typically gives four thermal

coefﬁcients explicitly deﬁned in JESD 51-12; these coef-

ﬁcients are quoted or paraphrased below:

θJA, the thermal resistance from junction to ambient, is

the natural convection junction-to-ambient air thermal

resistance measured in a one cubic foot sealed enclo-

sure. This environment is sometimes referred to as

“still air” although natural convection causes the air to

move. This value is determined with the part mounted to

a JESD 51-9 deﬁned test board, which does not reﬂect

an actual application or viable operating condition.

θJCbottom, the thermal resistance from junction to the

bottom of the product case, is the junction-to-board

thermal resistance with all of the component power

dissipation ﬂowing through the bottom of the package.

In the typical μModule, the bulk of the heat ﬂows out

the bottom of the package, but there is always heat

ﬂow out into the ambient environment. As a result, this

thermal resistance value may be useful for comparing

packages but the test conditions don’t generally match

the user’s application.

θJCtop, the thermal resistance from junction to top of

the product case, is determined with nearly all of the

component power dissipation ﬂowing through the top

of the package. As the electrical connections of the

typical μModule are on the bottom of the package, it

is rare for an application to operate such that most of

the heat ﬂows from the junction to the top of the part.

As in the case of

θJCbottom, this value may be useful

for comparing packages but the test conditions don’t

generally match the user’s application.

θJB, the thermal resistance from junction to the printed

circuit board, is the junction-to-board thermal resistance

where almost all of the heat ﬂows through the bottom

of the μModule and into the board, and is really the

sum of the

θJCbottom and the thermal resistance of the

bottom of the part through the solder joints and through

a portion of the board. The board temperature is mea-

sured a speciﬁed distance from the package, using a

two sided, two layer board. This board is described in

JESD 51-9.

A graphical representation of the aforementioned thermal

resistances is given in Figure 6; blue resistances are

contained within the μModule regulator, whereas green

resistances are external to the μModule.

As a practical matter, it should be clear to the reader that

no individual or sub-group of the four thermal resistance

parameters deﬁned by JESD 51-12 or provided in the

Pin Conﬁguration section replicates or conveys normal

operating conditions of a μModule. For example, in normal

board-mounted applications, never does 100% of the

device’s total power loss (heat) thermally conduct exclu-

sively through the top or exclusively through bottom of the

μModule—as the standard deﬁnes for

θJCtopandθJCbottom,

respectively. In practice, power loss is thermally dissipated

in both directions away from the package—granted, in the

absence of a heat sink and airﬂow, a majority of the heat

ﬂow is into the board.

Within a SIP (system-in-package) module, be aware there

are multiple power devices and components dissipating

power, with a consequence that the thermal resistances

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