Data Sheet

21

Rev. 1.0, 2008-10-30

TLE7239GS

Protection Functions

7

Protection Functions

The device provides embedded protective functions. Integrated protection functions are designed to prevent IC

destruction under fault conditions described in this data sheet. Fault conditions are considered as “outside” normal

operating range. Protection functions are not designed for continuous repetitive operation.

7.1

Over Load Protection

The TLE7239GS is protected in case of over load or short circuit of the load. After time

t

channel n switches off and the according diagnosis flag Dn is set. The channel can be switched on after clearing

the protection latch by command CMD.CPL = 1. The CPL command clears itself with the next valid SPI

communication frame. Please refer to Figure 7 for details.

Figure 7

Shut Down at Over Load

7.2

Over Temperature Protection

A temperature sensor for each channel causes an overheated channel to switch off to prevent destruction. The

according diagnosis flag is set. This flag is also set in OFF state, if the regarding channel temperature is too

high.The channel can be only switched on after clearing the protection latch by SPI command CMD.CPL = 1. The

CPL command clears itself with the next valid SPI communication frame. Please refer to “Diagnostic Features”

on Page 23 for information on diagnosis features.

7.3

ESD protection

There is a designed in protection against ESD disturbances up to the specified limit by using the defined model.

Please see electrical characteristics “ESD susceptibility on all pins” on Page 11

7.4

Reverse Polarity Protection

There is a reverse polarity protection implemented in the TLE7239GS. This protection has to be divided into two

parts. First the protection of the control circuits and second in the protection of the power transistors.

The control circuits are reverse polarity protected by protective measures in the ground connection. In case of

reverse polarity, there is no current flow through the control circuits. To ensure this functionality, the GND pin and

the substrate connections SUB must not be connected to the same potential. This means, the copper area

dedicated for cooling will be connected at SUB and needs to be electrically isolated from GND.

The digital pins need serial resistors if the connected input stages are not floating to ground.

The power transistors contain intrinsic body diodes that cause power dissipation. The reverse current through

these intrinsic body diodes has to be limited by the connected loads. The over temperature and over load

protection are not active during reverse polarity.

7.5

In case of loss of

V

ground connection or through an additional path from

V

Figure 14 “Application Diagram” on Page 35) can be placed.

IN

I

D0

t

t

OverLoad.emf

t

OFF(OV L)

I

D0(OV L)

CPL = 1

b

D0 = 1

b

D0 = 00

b