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MPC8535E 数据表(PDF) 13 Page - Freescale Semiconductor, Inc |
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MPC8535E 数据表(HTML) 13 Page - Freescale Semiconductor, Inc |
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13 / 126 page  Pin Map MPC8535E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 3 Freescale Semiconductor 13 Programmable Interrupt Controller MCP Machine check processor Y14 I OVDD — UDE Unconditional debug event AB14 I OVDD — IRQ[0:8] External interrupts AG22,AF17,AB23, AF19,AG17,AF16, AA22,Y19,AB22 IOVDD — IRQ[9]/DMA_DREQ[3] External interrupt/DMA request AE13 I OVDD 1 IRQ[10]/DMA_DACK[3] External interrupt/DMA Ack AD13 I/O OVDD 1 IRQ[11]/DMA_DDONE[3] External interrupt/DMA done AD14 I/O OVDD 1 IRQ_OUT Interrupt output AC17 O OVDD 2,4 Ethernet Management Interface EC_MDC Management data clock Y10 O OVDD 5,9,22 EC_MDIO Management data In/Out Y11 I/O OVDD — Gigabit Reference Clock EC_GTX_CLK125 Reference clock AA6 I LVDD 31 Three-Speed Ethernet Controller (Gigabit Ethernet 1) TSEC1_TXD[7:0] Transmit data AA8,AA5,Y8,Y5,W3, W5,W4,W6 OLVDD 5,9,22 TSEC1_TX_EN Transmit Enable W1 O LVDD 23 TSEC1_TX_ER Transmit Error AB5 O LVDD 5,9 TSEC1_TX_CLK Transmit clock In AB4 I LVDD — TSEC1_GTX_CLK Transmit clock Out W2 O LVDD — TSEC1_CRS Carrier sense AA9 I/O LVDD 17 TSEC1_COL Collision detect AB6 I LVDD — TSEC1_RXD[7:0] Receive data AB3,AB7,AB8,Y6,AA2, Y3,Y1,Y2 ILVDD — TSEC1_RX_DV Receive data valid AA1 I LVDD — TSEC1_RX_ER Receive data error Y9 I LVDD — TSEC1_RX_CLK Receive clock AA3 I LVDD — Three-Speed Ethernet Controller (Gigabit Ethernet 3) TSEC3_TXD[7:0] Transmit data T12,V8,U8,V9,T8,T7, T5,T6 OLVDD 5,9,22 TSEC3_TX_EN Transmit Enable V5 O LVDD 23 TSEC3_TX_ER Transmit Error U9 O LVDD 5,9 Table 1. MPC8535E Pinout Listing Signal Signal Name Package Pin Number Pin Type Power Supply Notes |
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