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AD7468BRT-R 数据表(PDF) 20 Page - Analog Devices |
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AD7468BRT-R 数据表(HTML) 20 Page - Analog Devices |
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20 / 28 page ![]() AD7466/AD7467/AD7468 Rev. C | Page 20 of 28 POWER CONSUMPTION The AD7466/AD7467/AD7468 automatically enter power- down mode at the end of each conversion or if CS is brought high before the conversion is finished. When the AD7466/AD7467/AD7468 are in power-down mode, all the analog circuitry is powered down and the current con- sumption is typically 8 nA. To achieve the lowest power dissipation, there are some considerations the user should keep in mind. The conversion time is determined by the serial clock frequency; the faster the SCLK frequency, the shorter the conversion time. This implies that as the frequency increases, the part dissipates power for a shorter period of time when the conversion is taking place, and it remains in power-down mode for a longer percentage of the cycle time or throughput rate. Figure 26 shows two AD7466s running with two different SCLK frequencies, SCLK A and SCLK B, with SCLK A having the higher SCLK frequency. For the same throughput rate, the AD7466 using SCLK A has a shorter conversion time than the AD7466 using SCLK B, and it remains in power-down mode longer. The current consumption in power-down mode is very low; thus, the average power consumption is greatly reduced. This reduced power consumption can be seen in Figure 25, which shows the supply current vs. SCLK frequency for various supply voltages at a throughput rate of 100 kSPS. For a fixed throughput rate, the supply current (average current) drops as the SCLK frequency increases because the part is in power- down mode most of the time. It can also be seen that, for a lower supply voltage, the supply current drops accordingly. 390 360 330 300 270 240 210 180 150 120 90 60 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 SCLK FREQUENCY (MHz) fSAMPLE = 100kSPS TEMP = 25 °C VDD = 3.6V VDD = 3.0V VDD = 2.2V VDD = 2.7V VDD = 1.8V VDD = 1.6V Figure 25. Supply Current vs. SCLK Frequency for a Fixed Throughput Rate and Different Supply Voltages SCLK B SCLK A 116 116 CONVERSION TIME A CONVERSION TIME B 1/THROUGHPUT CS Figure 26. Conversion Time Comparison for Different SCLK Frequencies and a Fixed Throughput Rate POWER DOWN TIME B 1/THROUGHPUT B 1/THROUGHPUT A POWER DOWN TIME A CONVERSION TIME A CONVERSION TIME B CS A SCLK CS B 116 Figure 27. Conversion Time vs. Power-Down Time for a Fixed SCLK Frequency and Different Throughput Rates |
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