ADP5033ACBZ-1-R7 datasheet(17/28 Pages) AD

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ADP5033

Rev. 0 | Page 17 of 28

THEORY OF OPERATION

ENABLE

AND MODE

CONTROL

LDO

CONTROL

LDO

UNDERVOLTAGE

LOCK OUT

SOFT START

PWM/

PSM

CONTROL

BUCK2

DRIVER

AND

ANTISHOOT

THROUGH

SOFT START

PWM/

PSM

CONTROL

BUCK1

DRIVER

AND

ANTISHOOT

THROUGH

OSCILLATOR

THERMAL

SHUTDOWN

SYSTEM

UNDERVOLTAGE

LOCKOUT

PWM

COMP

GM ERROR

AMP

GM ERROR

AMP

PSM

COMP

PSM

COMP

LOW

CURRENT

ILIMIT

PWM

COMP

LOW

CURRENT

ILIMIT

ADP5033

VOUT1 VOUT2

VIN1

SW1

PGND1

ENA

ENBK1

ENBK2

ENLDO1

ENLDO2

ENB

VDDA

VIN3

AGND VOUT3

PGND2

MODE

SW2

VIN2

LDO

CONTROL

LDO

UNDERVOLTAGE

LOCK OUT

VDDA

VIN4

VOUT4

ENLDO1

600Ω

ENBK2

75Ω

ENBK1

75Ω

ENLDO1

600Ω

SEL

OPMODE

MODE2

VDDA

Figure 43. Functional Block Diagram

POWER MANAGEMENT UNIT

The ADP5033 is a micropower management unit (μPMU)

combing two step-down (buck) dc-to-dc convertors and two

low dropout linear regulators (LDO). The high switching

frequency and tiny 16-ball WLCSP package allow for a small

power management solution.

To combine these high performance regulators into the μPMU,

there is a system controller allowing them to operate together.

The buck regulators can operate in forced PWM mode if the

MODE pin is at a logic high level. In forced PWM mode, the

buck switching frequency is always constant and does not

change with the load current. If the MODE pin is at logic low,

the switching regulators operate in auto PWM/PSM mode.

In this mode, the regulators operate at fixed PWM frequency

when the load current is above the power saving current thresh-

old. When the load current falls below the power save current

threshold, the regulator in question enters PSM where the

switching occurs in bursts. The burst repetition is a

function of the current load and the output capacitor value.

This operating mode reduces the switching and quiescent cur-

rent losses. The auto PWM/PSM mode transition is controlled

independently for each buck regulator. The two bucks operate

synchronized to each other.

When a regulator is turned on, the output voltage ramp is

controlled through a soft start circuit to avoid a large inrush

current due to the charging of the output capacitors.

Thermal Protection

In the event that the junction temperature rises above 150°C,

the thermal shutdown circuit turns off all the regulators. Extreme

junction temperatures can be the result of high current opera-

tion, poor circuit board design, or high ambient temperature.

A 20°C hysteresis is included so that when thermal shutdown

occurs, the regulators do not return to operation until the on-chip

temperature drops below 130°C. When coming out of thermal

shutdown, all regulators restart with soft start control.

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