CY8C53_11 datasheet(60/106 Pages) CYPRESS

部件名	CY8C53

功能描述	Programmable System-on-Chip (PSoC) DC to 67 MHz operation

PDF	106 Pages

Scroll/Zoom	100%

制造商	CYPRESS [Cypress Semiconductor]

网页	http://www.cypress.com

标志

60 / 106 page

PRELIMINARY

PSoC® 5: CY8C53 Family Datasheet

Document Number: 001-66237 Rev. *A

Page 60 of 106

Note

14. Based on device characterization (Not production tested).

Table 11-3. AC Specifications[14]

Parameter

Description

Conditions

Min

Typ

Max

Units

FCPU

CPU frequency

–

67.01

MHz

FBUSCLK

Bus frequency

–

67.01

MHz

Svdd

VDD ramp rate

–

V/ns

TIO_INIT

Time from VDDD/VDDA/VCCD/VCCA

≥ IPOR to I/O ports set to their reset

states

–

µs

TSTARTUP

Time from VDDD/VDDA/VCCD/VCCA

≥ min operating voltage to CPU

executing code at reset vector

No PLL used, IMO boot mode 12 MHz

typ.

–

µs

TSLEEP

Wakeup from limited active mode –

Application of non-LVD interrupt to

beginning of execution of next CPU

instruction

–

µs

THIBERNATE Wakeup form hibernate mode –

Application of external interrupt to

beginning of execution of next CPU

instruction

–

100

µs

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