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CY8C53 数据表(PDF) 22 Page - Cypress Semiconductor

部件名 CY8C53
功能描述  Programmable System-on-Chip (PSoC) DC to 67 MHz operation
PDF  106 Pages
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制造商  CYPRESS [Cypress Semiconductor]
网页  http://www.cypress.com
标志 CYPRESS - Cypress Semiconductor

CY8C53 数据表(HTML) 22 Page - Cypress Semiconductor

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PRELIMINARY
PSoC® 5: CY8C53 Family Datasheet
Document Number: 001-66237 Rev. *A
Page 22 of 106
6.2 Power System
The power system consists of separate analog, digital, and I/O supply pins, labeled VDDA, VDDD, and Vddiox, respectively. It also
includes two internal 1.8 V regulators that provide the digital (VCCD) and analog (VCCA) supplies for the internal core logic. The output
pins of the regulators (VCCD and VCCA) and the VDDIO pins must have capacitors connected as shown in Figure 6-4. The two VCCD
pins must be shorted together, with as short a trace as possible, and connected to a 1 µF ±10% X5R capacitor. The power system
also contains a sleep regulator and a hibernate regulator.
Figure 6-4. PSoC Power System
Note The two VCCD pins must be connected together with as short a trace as possible. A trace under the device is recommended, as
shown in Figure 2-4.
Vssb
Vddio0
Vssa
Vcca
Vdda
Digital
Regulators
Analog
Regulator
Analog
Domain
Digital
Domain
Sleep
Regulator
Hibernate
Regulator
I/O Supply
I/O Supply
I/O Supply
I/O Supply
.
Vddio2
Vddio0
Vddio3
Vddio1
0.1 µF
0.1 µF
0.1 µF
0.1 µF
Vddd
Vddd
1 µF
1 µF
Vdda
0.1 µF
0.1 µF
0.1µF
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