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CY8C53 数据表(PDF) 74 Page - Cypress Semiconductor |
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CY8C53 数据表(HTML) 74 Page - Cypress Semiconductor |
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74 / 106 page  PRELIMINARY PSoC® 5: CY8C53 Family Datasheet Document Number: 001-66237 Rev. *A Page 74 of 106 11.5.3 SAR ADC 11.5.4 Analog Globals Table 11-21. SAR ADC DC Specifications Parameter Description Conditions Min Typ Max Units Resolution – – 12 bits Number of channels – single-ended – – No of GPIO Number of channels – differential Differential pair is formed using a pair of neighboring GPIO. –– No of GPIO/2 Monotonicity[26] Yes – – Ge Gain error – – ±0.1 % VOS Input offset voltage – – ±0.2 mV IDD Current consumption – – 1 mA Input voltage range – single-ended[26] VSSA –VDDA V Input voltage range – differential[26] VSSA –VDDA V PSRR Power supply rejection ratio[26] 70 – – dB CMRR Common mode rejection ratio 35 – – dB INL Integral non linearity[26] Internal reference – – ± 2LSB DNL Differential non linearity[26] Internal reference – – ± 2LSB RIN Input resistance[26] –TBD – K Ω Table 11-22. SAR ADC AC Specifications Parameter Description Conditions Min Typ Max Units Sample rate[26] – – 770 ksps Startup time[26] – – 10 µs SINAD Signal-to-noise ratio[26] 44 – – dB THD Total harmonic distortion[26] – – 0.02 % Table 11-23. Analog Globals AC Specifications Parameter Description Conditions Min Typ Max Units Rppag Resistance pin-to-pin through analog global VDDA = 3.0 V – 939 1461 Ω Rppmuxbus Resistance pin-to-pin through analog mux bus VDDA = 3.0 V – 721 1135 Ω Note 26. Based on device characterization (Not production tested). [+] Feedback |
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