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Revision 3.4

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AS8510

Datasheet - Detailed Descr i p ti on

Figure 4. State Transition Diagram

7.4.1 Normal Mode 1 (NOM1)

On Power-on-reset of the device, AS8510 goes into STOP State.

Transition to Normal mode1 (NOM1) occurs when the “START BIT” D0 of Mode Control Register MOD_CTL_REG in Table 33 is set to “1”

through the serial port SPI. Data Rate of voltage and current channels can be independently programmed and both the channels generate

interrupts for every output available from ADC. The interrupt signal is generated on the INT pin. The width of the interrupt pulse is eight cycles of

lp_clk. The data is stable up to the next interrupt. If the data rate is different for the two channels, the interrupt rate would follow the higher rate

among the two channels. Data update can be known by reading the status register. The functionality is explained in the waveform shown in

Figure 5. When the device is configured to NOM1 Mode from any mode the configuration should be through the STOP state only.

STOP

OTP_INT

RESET

NORM

A_STB

SBM_ON

SBM_OFF

stop

star

t

NORM

or

stop

Analog Stablization

period

Wait for 1.5msec

1.5msec &

NORM

SBM

Wait for TT1

timeout

Wait for x

number of

conversions

Wait for otp_load

Completes in 32 cycles

of lp_clk