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AS8510 数据表(PDF) 39 Page - ams AG

部件名 AS8510
功能描述  Data Acquisition Device for Battery Sensors
PDF  46 Pages
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制造商  AMSCO [ams AG]
网页  http://www.ams.com
标志 AMSCO - ams AG

AS8510 数据表(HTML) 39 Page - ams AG

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www.austriamicrosystems.com/AS8510
Revision 3.4
39 - 46
AS8510
Datasheet - Detailed Descr i p ti on
Table 34 provides valid combinations of Modulator clock, Chopper clock and Decimation R1 and the corresponding values of TDATA_STATUS_RD
and TADC.
7.9.3 Soft-reset Using Bit D[7] of Reset Register 0x09
It is possible to soft-reset the device by writing “0” into D[7] bit of Reset Register at 0x09. On applying soft-reset, the device enters into
initialization state and D[7] bit changes back to “1”. The duration period of Initialization is 500µsec, and, during this period, INT pin toggles at the
rate of internal low power oscillator. Toggling on INT during the period of initialization should be ignored in the system. Device configuration and
activation should be carried out only after the initialization period. See Figure 17 for the timing details of the sequence of device initialization on
soft-reset.
Figure 17. AS8510 Device Initialization Sequence at Soft-reset
Table 34. Valid Combinations of Modulator Clock, Chopper Clock and Decimation Ratio R1
Modulator Clock
Chopper Frequency
CHOP_CLK
Decimation Ratio R1
TDATA_STATUS_RD
TADC
R2/(2*CHOP_CLK)
for R2=4
1MHz
2KHz
64
1usec * 64 * [4 - 2.5] = 96usec
1mSec
2MHz
2KHz
64
0.5usec * 64 * [8 - 2.5] = 176usec
1mSec
2MHz
2KHz
128
0.5usec * 128 * [4 - 2.5] = 96usec
1mSec
2MHz
4KHz
64
0.5usec * 64 * [4 - 2.5] = 48usec
0.5mSec
DATA-N
DATA-N+1
D4
D1
D2
D3
D4
D1
TDATA_STATUS_RD
TDATA_VALID
TDATA_INVALID
Re-Configure
Device
Start
ADC
INT
CHOP_CLK
Channel Data
Register
0x0000
DATA1
DATA2
D1
D2
D3
D4
D1
D2
D3
D4
D1
D2
D3
D4
500µS
1.5mS
TDATA_STATUS_RD
TDATA_VALID
TDATA_INVALID
Soft Reset
Using D7



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