71M6521FE-IMSLASHF datasheet(81/107 Pages) MAXIM

81 / 107 page

71M6521DE/DH/FE Data Sheet

Rev 2

Page: 81 of 107

VERSION[7:0]

2006

The version index. This word may be read by firmware to determine

the silicon version.

VERSION[7:0]

Silicon Version

0000 0110

A06

VREF_CAL

2004[7]

R/W

Brings VREF to VREF pad. This feature is disabled when

VREF_DIS=1.

VREF_DIS

2004[3]

R/W

Disables the internal voltage reference.

WAKE_ARM

20A9[7]

Arm the autowake timer. Writing a 1 to this bit arms the autowake

timer and presets it with the values presently in WAKE_PRD and

WAKE_RES. The autowake timer is reset and disarmed whenever

the MPU is in MISSION mode or BROWNOUT mode. The timer

must be armed at least three RTC cycles before the SLEEP or LCD-

ONLY mode is commanded.

WAKE_PRD

20A9[2:0]

001

R/W

Sleep time. Time=WAKE_PRD[2:0]*WAKE_RES. Default=001.

Maximum value is 7.

WAKE_RES

20A9[3]

R/W

Resolution of WAKE timer: 1 – 1 minute, 0 – 2.5 seconds.

WD_RST

SFRE8[7]

WD timer bit: Possible operations to this bit are:

Read: Gets the status of the flag IE_PLLFALL

Write 0: Clears the flag

Write 1:.Resets the WDT

WD_OVF

2002[2]

R/W

The WD overflow status bit. This bit is set when the WD timer

overflows. It is powered by the non-volatile supply and at bootup

will indicate if the part is recovering from a WD overflow or a power

fault. This bit should be cleared by the MPU on bootup. It is also

automatically cleared when RESET is high.

201F7:0]

Write operations on the RTC registers must be preceded by a write

operation to WE.

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