71M6521FE-IMSLASHF datasheet(6/107 Pages) MAXIM

6 / 107 page

71M6521DE/DH/FE Data Sheet

Page: 6 of 107

Rev 2

List of Figures

Figure 1: IC Functional Block Diagram....................................................................................................................................9

Figure 2: General Topology of a Chopped Amplifier .............................................................................................................11

Figure 3: AFE Block Diagram.................................................................................................................................................13

Figure 4: Samples from Multiplexer Cycle ............................................................................................................................16

Figure 5: Accumulation Interval ............................................................................................................................................16

Figure 6: Interrupt Structure .................................................................................................................................................37

Figure 7: Optical Interface....................................................................................................................................................40

Figure 8: Connecting an External Load to DIO Pins ..............................................................................................................42

Figure 9: 3-Wire Interface. Write Command, HiZ=0..............................................................................................................44

Figure 10: 3-Wire Interface. Write Command, HiZ=1............................................................................................................44

Figure 11: 3-Wire Interface. Read Command........................................................................................................................45

Figure 12: 3-Wire Interface. Write Command when CNT=0..................................................................................................45

Figure 13: 3-Wire Interface. Write Command when HiZ=1 and WFR=1. ..............................................................................45

Figure 14: Functions defined by V1 ......................................................................................................................................46

Figure 15: Voltage. Current, Momentary and Accumulated Energy ......................................................................................48

Figure 16: Timing Relationship between ADC MUX, Compute Engine, and Serial Transfers................................................49

Figure 17: RTM Output Format .............................................................................................................................................49

Figure 18: Operation Modes State Diagram..........................................................................................................................52

Figure 19: Functional Blocks in BROWNOUT Mode (inactive blocks grayed out).................................................................53

Figure 20: Functional Blocks in LCD Mode (inactive blocks grayed out)..............................................................................54

Figure 21: Functional Blocks in SLEEP Mode (inactive blocks grayed out)..........................................................................55

Figure 22: Transition from BROWNOUT to MISSION Mode when System Power Returns..................................................56

Figure 23: Power-Up Timing with V3P3SYS and VBAT tied together...................................................................................56

Figure 24: Power-Up Timing with VBAT only .......................................................................................................................57

Figure 25: Wake Up Timing...................................................................................................................................................58

Figure 26: MPU/CE Data Flow...............................................................................................................................................59

Figure 27: MPU/CE Communication .....................................................................................................................................59

Figure 28: Resistive Voltage Divider (Left), Current Transformer (Right) ............................................................................60

Figure 29: Resistive Shunt....................................................................................................................................................60

Figure 30: Error Band for VREF over Temperature (Regular-Accuracy Parts)......................................................................62

Figure 31: Error Band for VREF over Temperature (High-Accuracy Parts)...........................................................................63

Figure 32: Crystal Frequency over Temperature ...................................................................................................................64

Figure 33: Crystal Compensation..........................................................................................................................................65

Figure 34: Connecting LCDs .................................................................................................................................................66

Figure 35: I2C EEPROM Connection......................................................................................................................................68

Figure 36: Three-Wire EEPROM Connection.........................................................................................................................69

Figure 37: Connections for the RX Pin..................................................................................................................................69

Figure 38: Connection for Optical Components....................................................................................................................70

Figure 39: Voltage Divider for V1..........................................................................................................................................70

Figure 40: External Components for RESET: Development Circuit (Left), Production Circuit (Right) ..................................71

Figure 41: External Components for the Emulator Interface.................................................................................................71

Figure 42: Wh Accuracy, 0.1A to 200A at 240V/50Hz and Room Temperature....................................................................97

Figure 43: Meter Accuracy over Harmonics at 240V, 30A ....................................................................................................97

Figure 44: Typical Meter Accuracy over Temperature Relative to 25°C (71M6521FE).........................................................98

71M6521FE-IM/F 数据表(PDF) 6 Page - Maxim Integrated Products

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