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ADL5240ACPZ-R7 数据表(PDF) 19 Page - Analog Devices

部件名 ADL5240ACPZ-R7
功能描述  100 MHz to 4000 MHz RF/IF Digitally Controlled VGA
PDF  24 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADL5240ACPZ-R7 数据表(HTML) 19 Page - Analog Devices

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ADL5240
Rev. 0 | Page 19 of 24
LOOP PERFORMANCE
The ADL5240 can be configured so that either the DSA precedes
the amplifier (see Figure 36) or the amplifier precedes the DSA
(see Figure 37). The performance of the loop configurations is
presented in Figure 20 to Figure 27. To improve the overall return
loss, a shunt capacitor can be placed between the amplifier and
DSA. This helps to align the phases of the two blocks.
NC
VDD
NC
NC
NC
DSAOUT
NC
NC
NC
NC
VDD
DSAIN
ADL5240
NC
NC
NC
NC
SERIAL PARALLEL INTERFACE
68pF
100pF
1.2nF
470nH
VDD
VDD
0.1µF
RFOUT
RFIN
100pF
1µF
VCC
0.1µF
C1
C2
C3
C4
C5
C6
C7
L1
1
2
3
4
5
6
7
8
910
16
15
14
13
12
11
24
23
22
21
20
19
18
17
32 31
25
26
27
28
29
30
Figure 36. DSA-AMP Loop Configuration



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