ADL5240

Rev. 0 | Page 21 of 24

EVALUATION BOARD

The schematic of the ADL5240 evaluation board is shown in

Figure 39, the evaluation board configuration options are detailed

in Table 8, and the layout of the ADL5240 evaluation board is

shown in Figure 40 and Figure 41. Each RF trace on the evaluation

board has a characteristic impedance of 50 Ω and is fabricated

on Rogers3003 material. In addition, each trace is a coplanar

waveguide (CPWG) with a width of 25 mils, a spacing of 20 mils,

and a dielectric thickness of 10 mils. The input to and output

from the DSA and amplifier should be ac-coupled with capacitors

of appropriate values to ensure the broadband performance.

The bias to the amplifier is provided by connecting a choke to

the AMPOUT pin. Bypassing capacitors are recommended on

all supply lines to minimize the RF coupling. The DSA and the

amplifier can be individually biased or connected to the VDD

plane using Resistors R2 and R1.

The ADL5240 can be operated in two ways: the amplifier can

precede the DSA (AMP-DSA loop configuration) or the DSA

can precede the amplifier (DSA-AMP loop configuration). The

evaluation board can be configured to handle either option. In

normal operation, R12 and R13 are open, and R10 and R11 are

0 Ω and are used to terminate any RF coupling onto the bypass

trace. To configure the ADL5240 in AMP-DSA loop configuration,

R12 should be replaced with a capacitor, R13 should be replaced

with a 0 Ω resistor, and R10 and R11 should be left open. Similarly,

to configure the ADL5240 in the DSA-AMP loop configuration,

R16 should be replaced with a capacitor, R17 should be replaced

with a 0 Ω resistor, and R14 and R15 should be left open.

The digital signal traces incorporate a footprint for an RC filter

to prevent potential noise from coupling onto the signal. In normal

operation, Resistors R3 to R9 are 0 Ω and Capacitors C9 to C15

are open.