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MICRF219 数据表(PDF) 11 Page - Micrel Semiconductor

部件名 MICRF219
功能描述  300MHz to 450MHz ASK Receiver with RSSI, Auto-Poll, Bit-Che
PDF  23 Pages
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制造商  MICREL [Micrel Semiconductor]
网页  http://www.micrel.com
标志 MICREL - Micrel Semiconductor

MICRF219 数据表(HTML) 11 Page - Micrel Semiconductor

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Micrel
MICRF219
June 2011
11
M9999-060811
(408) 944-0800
Programm
Control Register Indiv
D0
D1
E: Desense
Serial Interface Register
ing
idual Truth Tables:
D2
MOD
0
X
esense - defaul
X
No D
t
1
0
Desense
0
6dB
1
1
0
16dB Desense
1
0
1
30dB Desense
1
nse
1
1
42dB Dese
D3
D
dwidth (at 433.92 Hz
4
Demod Ban
MODE:
M
)
0
0
5Hz
162
1
0
3250Hz
0
1
6500Hz
1
1
ault
13000Hz
- def
5
D
D
6
MODE
1
0
Slice Level 30%
0
1
vel 40%
Slice Le
1
1
0%
- default
Slice Level 5
0
0
el 60%
Slice Lev
Setting
D7
D8
MODE: Bit-Check
0
0
Bit-check 0 bits
- default
1
0
Bit-check 2 bits
0
1
Bit-check 4 bits
1
1
Bit-check 8 bits
D9
D10
Times (315
D11
Bit-Check Window
MODE:
MHz)
Set D3 to
D3=1
D3=0
D3=1
D3=0
Set D4 to
D4=0
D4=0
D4=1
D4=1
0
0
393us, 785us
0
98us, 196us,
1
0
, 183us, 367us, 733us
0
92us
0
1
0
85us, 170us, 341us, 681us
1
1
0
79us, 157us, 314us, 629us
0
0
us, 577us
1
72us, 144us, 288
1
0
us, 525us
1
66us, 131us, 262
0
1
us, 473us
1
59us, 118us, 236
1
1
us, 420us
1
53us, 105us, 210
D9
D10
D11
Bit-Check Window Times
(433.92MHz)
MODE:
Set D3 to
D3=1
D3=0
D3=1
D3=0
Set D4 to
D4=1
D4=1
D4=0
D4=0
0
0
0
71us, 143us, 285us, 570us
1
0
0
67us, 133us, 266us, 532us
0
1
0
62us, 124us, 247us, 494us
1
1
0
57us, 114us, 228us, 457us
0
0
1
52us, 105us, 209us, 419us
1
0
1
48us, 95us, 190us, 381us
0
1
1
43us, 86us, 172us, 343us
1
1
1
38us, 76us, 152us, 305us
Defau
te
0, D11 is 111
D12
D13
D14
MODE:
Sleep Time
lt Sta D9, D1
0
0
0
10ms
1
0
0
20ms
0
1
0
40ms Default
1
1
0
80ms
0
0
1
160ms
1
0
1
320ms
0
1
1
640ms
1
1
1
1280ms
E: Auto-Poll
D15
MOD
0
Awake – does not poll - default
1
Auto-polls with Sleep periods
t to 0
D16
Always Set This Bi
uelch Enable
SQ Pin
D17
MODE: Sq
0
0
Squelch Circuit Enabled
0
1
Squelch Circuit Disabled
1
0
Squelch Circuit Disabled (default)
1
1
Squelch Circuit Enabled
The external pin SQ can invert the setting of squelch
ster bit D17. The external pin
defaults high via an internal pull-up so the squelch is
off with default D17 = 0 and on if D17 = 1. Such bit
logic is reversed if SQ pin is tied to low (Ground).
D18
Always Set This Bit to 1
on/off defined by regi
D19
Always Set This Bit to 0



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