AD8141/AD8142

Rev. 0 | Page 22 of 24

AD8142

+

–

1kΩ

2kΩ

2kΩ

1kΩ

R

+

–

1kΩ

2kΩ

2kΩ

1kΩ

G

×2

+

–

1kΩ

2kΩ

2kΩ

1kΩ

B

+IN R

–OUT R

+OUT R

–OUT G

+OUT G

–OUT B

+OUT B

–IN R

SYNC LEVEL

+IN G

–IN G

+IN B

–IN B

DIS

K

2

K

2

K

2

Figure 47. AD8142 Conceptual Sync-On-Common-Mode Encoding Scheme

The transmitted common-mode sync signal magnitudes are

scaled by applying a dc voltage to the SYNC LEVEL input,

referenced to the negative supply. The difference between the

voltage applied to the SYNC LEVEL input and the negative supply

sets the peak deviation of the encoded sync signals about the

midsupply common-mode voltage. For example, with the SYNC

sync pulses about the nominal midsupply common-mode voltage

is nominally ±500 mV. The equations in Figure 47 describe how

constant, K, is equal to the peak deviation of the encoded sync

signals.

Figure 48 shows how the sync signals appear on each common-

mode voltage in a single 5 V supply application when the voltage

Although the typical setting for the SYNC LEVEL voltage is

500 mV above the negative supply, it can be increased, if

necessary, in extremely noisy environments. Increasing the

SYNC LEVEL voltage too much has the potential to produce

excessive EMI.

–2.5

2.5

7.5

12.5

17.5

0

0.25

0.50

0.75

1.00

1.25

1.50

1.75

2.00

2.25

0

40

80

120

160

200

240

280

320

360

400

TIME (ns)

SYNC LEVEL = 0.5V

Figure 48. AD8142 Sync-On-Common-Mode Signals in Single 5 V Application

LAYOUT AND POWER SUPPLY DECOUPLING

CONSIDERATIONS

When designing with the AD8141 and AD8142, adhere to

standard high speed printed circuit board (PCB) layout practices.

A solid ground plane is recommended and good wideband power

supply decoupling networks should be placed as close as possible

to the supply pins. Small surface-mount ceramic capacitors are

recommended for these networks, and tantalum capacitors are

recommended for bulk supply decoupling.

AMPLIFIER-TO-AMPLIFIER ISOLATION

The least amount of isolation between the three AD8142 amplifiers

exists between the green and red channels (Amplifier A and

Amplifier B for the AD8141). This is, therefore, viewed as the

worst-case isolation, which is reflected in Table 1 and the

Theory of Operation section.

EXPOSED PADDLE (EPAD)

The 24-lead LFCSP package has an exposed paddle on the

underside of its body. To achieve the specified thermal resistance, it

must have a good thermal connection to one of the PCB planes.

The exposed paddle must be soldered to a pad on top of the board

that is connected with several thermal vias to a ground plane.