ADL5336ACPZ-R7 datasheet(21/32 Pages) AD

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Data Sheet

ADL5336

Rev. B | Page 21 of 32

DETECTOR OUTPUT AND GAIN PIN

The ADL5336 has a pair of detector squaring cells. Each squaring

cell has a VGA output applied to its input. This is shown Figure 1

and Figure 62. These on-board detector squaring cells are used to

achieve an AGC function with the VGAs. Each of the squared

output signals is compared to a reference signal and the difference

is then output in a current-mode signal. The DTO1 pin is the

detector squaring cell output that taps off of the output VGA1,

and the DTO2 pin is the detector squaring cell output that taps

off of the output of VGA2. By shorting the DTO1 and GAIN1

pins together and putting a capacitor to ground on the DTO1/

GAIN1 node, the AGC function can be achieved using VGA1.

The same connections can be done to DTO2 and GAIN2 to

achieve the AGC function using VGA2. The MODE pin must

be pulled low for the AGC function. For more information on

the detector squaring cells and the AGC function, refer to the

AGC Operation section. For information concerning the capacitor

value used, refer to the Theory of Operation section.

COMMON-MODE BYPASSING

Decouple the two common-mode pins, VCM1 (Pin 1) and VCM2

(Pin 24), of the ADL5336 using low inductance, surface-mount

ceramic capacitors. The evaluation board has 0.1 µF capacitor

values for each of the common-mode pins (see Figure 70).

SERIAL PORT CONNECTIONS

The SPI port of the ADL5336 writes data into the device and

reads data out of it. The SPI port controls maximum VGA gain

levels, output setpoint levels, and VGA2 input selection. It is

recommended to put low-pass RC filtering on the SPI lines to

filter out any high frequency glitches if reading and writing to the

SPI port becomes problematic. Capacitors C26 through C29,

shown in Figure 70, can be populated, along with replacing the

standard 0 Ω jumper resistors (R9 to R12) to make an

appropriate low-pass RC filter network on each SPI line.

MODE AND ENABLE CONNECTIONS

The ADL5336 can have both a positive and negative gain slope.

This function is controlled by the MODE pin. When the MODE

is pulled high, it puts each VGA into traditional VGA mode, where

the gain slope is positive. When the MODE pin is pulled to

ground, both VGAs have a negative gain slope, which is needed

to obtain an AGC function with either VGA. The MODE

threshold voltage levels are: VMODE > 3 V for the positive gain

slope and VMODE < 2 V for the negative gain slope.

Pulling the ENBL pin high enables the part and allows for normal

operation. If the ENBL pin is pulled low, then the ADL5336 powers

down and only draws approximately 4 mA of supply current.

ERROR VECTOR MAGNITUDE (EVM)

EVM is a measure used to quantify the performance of a digital

radio transmitter or receiver by measuring the fidelity of the digital

signal transmitted or received. Various imperfections in the link,

such as magnitude and phase imbalance, noise, and distortion,

cause the constellation points to deviate from their ideal locations.

In general, as signal power increases, the distortion components

increase. A typical receiver exhibits the three following distinct

EVM limitations vs. the received input signal power:

•

At large enough signal levels, where the distortion

components due to the harmonic nonlinearities in the

device are falling in-band, EVM degrades as signal levels

increase.

•

At medium signal levels, where the signal chain behaves in

a linear manner and the signal is well above any notable noise

contributions, EVM has a tendency to reach an optimal level

determined dominantly by either the quadrature accuracy

and I/Q gain match of the signal chain or the precision of

the test equipment.

•

As signal levels decrease, such that noise is a major

contributor, EVM performance vs. the signal level exhibits

a decibel-for-decibel degradation with decreasing signal

level. At these lower signal levels, where noise is the dominant

limitation, decibel EVM is directly proportional to the SNR.

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