ADL5511ACPZ-R7 datasheet(19/28 Pages) AD

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Data Sheet

ADL5511

Rev. A | Page 19 of 28

APPLICATIONS INFORMATION

RFIN

ENBL

RMS

400Ω

20pF

ENVELOPE

VRMS

RMS

OUTPUT

ENVELOPE

OUTPUT

ENVELOPE

REFERENCE

VENV

EREF

VPOS

+5V

400Ω

FLT1

FLT2

FLT3

COMM

FLT4

VPOS

0.8pF

0.4pF

10kΩ

5pF

250Ω

100

Ω

ADL5511

BIAS AND POWER-

DOWN CONTROL

G = 1.7

G = 1.5

VPOS

75Ω

C14

0.1µF

C17

0.1µF

C13

100pF

C10

(SEE TEXT)

Figure 49. Basic Connections

BASIC CONNECTIONS

Basic connections for operation of the ADL5511 are shown in

Figure 49. The ADL5511 requires a single supply of 5 V. The

supply is connected to the VPOS supply pin. Decouple this

pin using two capacitors with values equal or similar to those

shown in Figure 49. Place these capacitors as close as possible

to the VPOS pin.

An external 75 Ω resistor combines with the relatively high

RF input impedance of the ADL5511 to provide a broadband

50 Ω match. Place an ac coupling capacitor between this resistor

and RFIN.

The envelope output is available on Pin 10 (VENV) and is

referenced to the 1.1 V dc voltage on Pin 9 (EREF).

The rms output voltage is available at the VRMS pin with rms

averaging provided by the supply-referenced capacitance on

Pin 14 (FLT4).

OPERATION BELOW 1 GHZ/ENVELOPE FILTERING

To operate the ADL5511 at frequencies below 1 GHz, a number

of external capacitors must be added to the FLT3, FLT2, and

FLT1 pins. These changes are in addition to the choice of an

appropriate rms averaging capacitor, see the Choosing a Value

for the RMS Averaging Capacitor (CFLT4) section.

As part of the internal signal processing algorithm, the RF

input signal passes through a low-pass filter comprising of a

10 kΩ resistor and a 5 pF capacitor (see Figure 49). This

corresponds to a corner frequency of approximately 3.2 MHz.

If the carrier frequency is less than approximately ten times this

value (32 MHz), this corner frequency must be reduced. The

internal 5 pF capacitance can be augmented by connecting a

ground referenced capacitor to Pin 3 (FLT1). The value of the

external capacitance is set using the following equation:

)

000

(

−

Ω

3dB

FLT1

(3)

For example, a 100 pF capacitance on FLT1 will reduce the

corner frequency to 150 kHz. As a general guideline, this

corner frequency should be set to be at least one tenth of the

minimum expected carrier frequency. This ensures a flat

frequency response around the frequency of interest.

The envelope detection path of the ADL5511 includes internal

carrier-suppression low-pass filtering. With the FLT2 and FLT3

pins not connected, two internal 1 GHz and 800 MHz low-pass

filters (operating in series) remove the RF carrier from the

envelope output signal.

The equations for these filters are as follows:

GHz

)

400

(

≅

Ω

(4)

and

MHz

800

)

250

(

≅

Ω

(5)

Because the envelope detection circuitry includes a full-wave

rectifier, this filter has to primarily suppress the signal at twice

the original input frequency.

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