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ADL5511ACPZ-R7 数据表(PDF) 24 Page - Analog Devices |
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ADL5511ACPZ-R7 数据表(HTML) 24 Page - Analog Devices |
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24 / 28 page  ADL5511 Data Sheet Rev. A | Page 24 of 28 EVALUATION BOARD Figure 59 shows the schematic of the ADL5511 evaluation board. This 4-layer board is powered by a single supply in the 4.75 V to 5.25 V range. The power supply is decoupled by 100 pF and 0.1 µF capacitors. Table 5 details the various configuration options of the evaluation board. Figure 60 and Figure 61 show the bottom side and top side layouts, respectively. The RF input has a broadband match of 50 Ω using a single 75 Ω resistor at R5. The VRMS output is accessible via a clip lead (a pad is also available where an SMA connector is installed). The VENV output is accessible via an SMA connector. For response- time critical measurements where stray capacitance must be minimized, R2 can be removed and a FET probe can be attached to JP1 (JP1 must be installed). Figure 59. Evaluation Board Schematic |
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