Data Sheet

ADL5511

Rev. A | Page 25 of 28

Figure 60. Layout of Evaluation Board, Bottom Side

Figure 61. Layout of Evaluation Board, Top Side

Table 5. Evaluation Board Configuration Options

Component

Description

Default Condition

VPOS, GND

Ground and supply vector pins.

Not applicable

C13, C14

Power supply decoupling. Nominal supply decoupling of 0.01 µF and 100 pF.

C13 = 100 pF (Size 0402)

C14 = 0.1 µF (Size 0402)

C17

RMS filter capacitor (FLT4). The internal rms averaging capacitor can be augmented by

placing additional capacitance in C17.

C17 = 0.1 µF (Size 0402)

R5, C1

RF input interface. The 75 Ω resistor at R5 combines with the ADL5511 internal input

impedance to give a broadband input impedance of around 50 Ω. C1 is an ac coupling

capacitor, which should be chosen according to nominal carrier frequency.

R5 = 75 Ω (Size 0402)

C1 = 100 pF (Size 0402)

R18, C9

RMS output and output filtering. The combination of C9 and the internal 100 Ω output

resistance can be used to form a low-pass filter to reduce the output noise on the VRMS

output beyond the reduction due to C17 (capacitor on FLT4). The rms output is available

on the VRMS clip-on test point. To observe VRMS using an SMA cable, an SMA connector

can be soldered on to the pad labeled VRMS1.

R18 = 0 Ω (Size 0402)

C9 = open (Size 0402)

VRMS clip-on test point =

installed

VRMS1 SMA connector =

open

R19, C8, R2,

JP1

VENV output and output filtering. The VENV output is available on the VENV SMA

connector. If post-envelope filtering is desired, R19 and C8 can be used to form a low-pass

filter at the VENV output.

R2 can be removed to isolate the JP1 jumper from the VENV SMA connector and JP1 can

be installed and used to interface to a FET probe. This helps to eliminate any excessive

trace and connector capacitance.

VENV SMA connector =

installed

R19, R2 = 0 Ω (Size 0402)

C8 = open (Size 0402)

JP1 = open

R20, C7

Envelope reference output and output filtering. The EREF output is available on the EREF

clip-on test point. The dc reference voltage at Pin EREF can be filtered by the low-pass filter

formed by the combination of R20 and C7. To observe the EREF voltage using an SMA

cable, an SMA connector can be soldered onto the pad labeled EREF1.

R20 = 0 Ω (Size 0402)

C7 = open (Size 0402)

EREF clip-on test point =

installed

EREF1 SMA connector = open

R1, SW1

Device enable. When the switch is set toward the SW1 label, the ENBL pin is connected to VPOS,

which enables the ADL5511. In the opposite switch position, the ENBL pin is grounded which

disables the ADL5511.

R1 = 0 Ω (Size 0402)

SW1 = towards SW1 label

C6, C10

Envelope carrier-removal filters (FLT2, FLT3). The corner frequency of the internal VENV two-pole

carrier-removal filter can be reduced by placing additional capacitors in C6 and C10.

C6, C10 = open (Size 0402)

C2

Envelope reference carrier-removal filter (FLT1). The internal filter that removes the carrier from

the envelope reference dc voltage can be augmented by placing a capacitor in C2.

C2 = 100 pF (Size 0402)

R3, R14, R15,

R16, R17

Alternate interface. The P2 edge connector provides an alternate access point to the

various ADL5511 signals.

R3, R14, R15, R16, R17 = open

(Size 0402)