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AS8221-ASSP 数据表(PDF) 23 Page - ams AG |
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AS8221-ASSP 数据表(HTML) 23 Page - ams AG |
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23 / 42 page ![]() AS8221 Datasheet - Application In form atio n www.austriamicrosystems.com/flexray/AS8221 Revision 1.7 23 - 42 9.4.6 Error Flag (ERROR) The ERROR is signalled on the ERRN pin according to Table 6 and Table 8. The flag is set if at least one of the error flags in chapters 9.4.2 to 9.4.5 is set. The flag will be reset if none of the flags in chapters 9.4.2 to 9.4.5 is set. 9.5 Status Flags 9.5.1 Local Wake Flag (LWAKE) See chapter 8.7 Wake-Up Events on page 16 9.5.2 Remote Wake Flag (RWAKE) see chapter 8.7 Wake-Up Events on page 16 9.5.3 Power on Flag (PWON) The PWON is set leaving the POWER-OFF state and it is reset entering a low-power mode after a non-low-power mode. 9.6 Error Flags and Status Flags Read-Out The readout mechanism consists of two information groups: 1. Error read-out 2. Status information read-out The read-out mechanism as serial transmission on Pin EN and ERRN: The error flags and the status flags can be read-out by applying a clock signal to pin EN in a non-low-power mode. A falling edge on pin EN starts the read-out loading the content of the error/status flag into the shift register and signaling the error flag on the ERRN pin. On the second falling edge the first flag (Bit 0) will be shifted out. The ERRN data is valid after tRO_EN_ERRN. If EN pin keeps on toggling after the last flag (Bit 15) the next flag again is Bit 0. The complete list of bits is shown in Table 10. If no transition is detected on pin EN for longer than tRO_EN_TIMEOUT the device enters the operation mode selected by the host pins. Figure 10. Timing of the Read-out Mechanism Table 9. Read-out Mechanism and Transceiver States State Enabled / Disabled NORMAL mode Enabled RECEIVE-ONLY mode Enabled STANDBY mode Disabled GO-TO-SLEEP mode Disabled SLEEP mode Disabled EN ERRN 50% VIO ERROR FLAG Bit 0 Bit 1 Bit 2 t < tRO_EN_TIMEOUT tRO_EN_ERRN t > tRO_EN__TIMEOUT ERRN ERRN 50% VIO |
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