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AS8221-ASSP 数据表(PDF) 37 Page - ams AG |
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AS8221-ASSP 数据表(HTML) 37 Page - ams AG |
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37 / 42 page  AS8221 Datasheet - Appendi x www.austriamicrosystems.com/flexray/AS8221 Revision 1.7 37 - 42 Power Supply Interface ΔVOINH High level voltage drop on INH1, INH2 - - | IIL | Leakage current - - Communication Controller Interface VTxDIH Threshold for detecting TxD as on logical high uVIO-IN-HIGH Threshold for detecting a digital input as on logical high VTxDIL Threshold for detecting TxD as on logical low uVIO-IN-LOW Threshold for detecting a digital input as on logical low ITxDIH TxD high level input current - - ITxDIL TxD low level input current - - VTxENIH Threshold for detecting TxEN as on logical high uVIO-IN-HIGH Threshold for detecting a digital input as on logical high VTXENIL Threshold for detecting TxEN as on logical low uVIO-IN-LOW Threshold for detecting a digital input as on logical low ITxENIH TxEN high level input current - - ITxENIL TxEN low level input current - - VRxDOH RxD high level output voltage uVIO-OUT-HIGH Output voltage on a digital output, when in logical high state VRxDOL RxD low level output voltage uVIO-OUT-LOW Output voltage on a digital output, when in logical low state Host Interface VSTBNIH Threshold for detecting STBN as on logical high uVIO-IN-HIGH Threshold for detecting a digital input as on logical high VSTBNIL Threshold for detecting STBN as on logical low uVIO-IN-LOW Threshold for detecting a digital input as on logical low ISTBNIH STBN high level input current - - ISTBNIL STBN low level input current - - tSTBN_DEB_LP STBN de-bouncing time low-power modes - - tSTBN_DEB_NLP STBN de-bouncing time non-low-power modes -- VENIH Threshold for detecting EN as on logical high uVIO-IN-HIGH Threshold for detecting a digital input as on logical high Table 12. Comparison Table AS8221 Datasheet FlexRay Electrical Physical Layer Specification V2.1 Rev. B Symbol Parameter Name Description |
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