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XTNETA1570MFP 数据表(PDF) 19 Page - Texas Instruments

部件名 XTNETA1570MFP
功能描述  ATM SEGMENTATION AND REASSEMBLY DEVICE WITH INTEGRATED 64-BIT PCI-HOST INTERFACE
PDF  68 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

XTNETA1570MFP 数据表(HTML) 19 Page - Texas Instruments

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TNETA1570
ATM SEGMENTATION AND REASSEMBLY DEVICE
WITH INTEGRATED 64BIT PCIHOST INTERFACE
SDNS033B − JUNE 1995 − REVISED MAY 1996
19
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251−1443
PRINCIPLES OF OPERATION
Host Interface
49
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Internal Registers and Counters
58
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
Control-Memory Maps
66
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Table of Contents
Functional Overview
19
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Segmentation Operation
26
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Reassembly Operation
35
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Cell Interface
46
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
functional overview
The function of the TNETA1570 is centered around the entries in the TX DMA state table for segmentation and
the RX DMA state table for reassembly. The entries in the tables hold information regarding what type of data
to process, where to find it or store it, and the current status of the segmentation/reassembly process for the
entry.
For segmentation, the scheduler table is used to select the next entry in the TX DMA state table for processing.
For reassembly, the VPI and VCI fields of the incoming ATM cell are decoded using the VPI/VCI DMA pointer
table to locate the entry in the RX DMA state table for processing.
The data interface to the host is the 32-bit/64-bit PCI-bus interface. The interface to the ATM layer is the UTOPIA
interface.
functional block diagram
Segmentation
Control-
Memory
Interface
and
Arbitration
PCI Bus
Reassembly
PCI-Bus
Interface
Control Memory
Segmentation
Scheduler
Reassembly
Time Out
Reassembly
UTOPIA
Interface
JTAG
Reassembly
UTOPIA
Interface
UTOPIA Transmit
UTOPIA Receive
Payload Data
Other Data
The TNETA1570 can be configured to transmit and receive either AAL5 or transparent-AAL packets. The
segmentation and reassembly of AAL5 packets is performed in accordance with ITU-T specifications I.361 and
I.363 (11/93 update). The protocol used to segment and reassemble AAL5 packets is well specified in the ITU-T
documents. The protocols for segmenting and reassembling a transparent-AAL packet is not specified by any
known standards body; therefore, there is no official sanction for a transparent AAL and no interoperability
specification exists. However, a transparent AAL provides a convenient method for transporting proprietary
control and data information or data traffic that does not fit well in a currently defined AAL (i.e., voice/video
traffic).
NOTE: The terms transmit and segmentation are both used to describe the segmentation operation and the terms receive and reassemble are
both used to describe the reassembly operation in this document.



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