TNETA1500

155.52-MBIT/S SONET/SDH ATM RECEIVER/TRANSMITTER

SDNS021D – MARCH 1994 – REVISED JANUARY 1998

7

POST OFFICE BOX 655303

receive operation (continued)

The clock signal recovered from the incoming serial-data stream also can be used as the transmit clock for the

transmit section. This is known as clock looping. The advantage of using the recovered receive clock as the

transmit clock is that the transmit clock is frequency locked to the same clock source that is used to generate

the incoming data stream. If this clock source provides a highly accurate low-PPM (low parts per million) clock,

the transmit clock also is a very accurate clock. The drawback to using clock looping is that if the receive signal

is lost for any reason, the transmit clock also is lost.

A facility-loopback (FLB) input loops the input data and recovered clock to the transmit output data and clock.

This provides a method of testing the function of the clock-recovery circuit and its jitter performance. It also can

be used for system-loopback testing.

The PECL inputs FLAGT and FLAGC are provided for interfacing to the loss-of-optical-signal outputs on optical

receivers. If the optical signal is lost, the loss-of-optical-carrier bit in the interrupt register is set and the interrupt

output (INTR) becomes active low.

The recovered clock signal and retimed input data are passed from the clock-recovery circuit to the framing

circuit. The framing circuit searches for the SONET framing bytes A1 and A2 where A1 has a set value of F6h

and A2 has a value of 28h. The exact framing pattern for an STS-3c frame is A1A1A1A2A2A2

(F6F6F6282828h). These bytes are not scrambled by the transmitter.

The TNETA1500 provides loss-of-signal (LOS), out-of-frame (OOF), and loss-of-frame (LOF) alarms in

accordance with BellCore specification TR-NWT-000253, Issue 2, December 1991. The LOS alarm goes active

when no transitions are detected on the receive serial data for 3.3

µs. The LOS alarm goes inactive when two

consecutive framing patterns have been detected, and during the intervening time (one frame time), no

transitionless 3.3-

µs period is detected. The OOF alarm goes active when four consecutive-errored framing

patterns are received. The OOF alarm clears when two successive error-free framing patterns are received.

If the OOF condition fails to clear within 3 ms, the LOF alarm goes active. The LOF alarm goes inactive when

eight consecutive error-free SONET frames are identified. The LOS, OOF, and LOF alarms are indicated by

external signals and by setting a bit in the interrupt registers. This causes INTR of the controller interface to go

active low, signaling an interrupt.

After the SONET frame is established and the serial data converted to byte-wide data, the B1 BIP-8 parity is

calculated over the scrambled SONET frame. This value is compared with the value of B1 contained in the next

(n + 1) frame. The value of B1 calculated over the previous frame (n – 1) is compared to the value B1 in this

frame (frame n). If the two values do not match, B1ERR goes active, denoting that a B1 parity error has occurred.

In addition, the B1 parity-error bit in the interrupt register is set and INTR goes active low.

Next, the SONET frame is unscrambled (except for the A1, A2, and C1 bytes, which were not scrambled by the

transmitter). The B2 BIP-24 value is calculated over all the bits of the line overhead and the STS-3c envelope

capacity and compared to the value contained in the next frame. If a B2 parity error occurs, the B2 parity-error

bit in the interrupt register is set and INTR goes active low to notify the controller that a parity error has occurred.

The TNETA1500 monitors the receive K2 byte for line alarm-indication signal (LAIS) and line far-end receive

failure (LFERF) alarms. An LAIS alarm occurs when bits 6–8 of the receive K2 byte are set to a value of 111

for five consecutive frames. The LAIS alarm goes inactive when bits 6–8 of the receive K2 byte are set to any

value other than 111 for five consecutive frames. The LFERF alarm goes active when bits 6–8 of the receive

K2 byte are set to a value of 110 for five consecutive frames. The LFERF alarm goes inactive when bits 6–8

of the receive K2 byte are set to any value other than 110 for five consecutive frames. Both the LAIS and LFERF

alarms are indicated on an external terminal and by setting a bit in interrupt register 2.