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TNETE100A 数据表(PDF) 20 Page - Texas Instruments |
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TNETE100A 数据表(HTML) 20 Page - Texas Instruments |
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20 / 26 page ![]() ThunderLAN ™ TNETE100A PCI ETHERNET ™ CONTROLLER SINGLE-CHIP 10 BASE-T WITH MII FOR 100 BASE-T/100VG-AnyLAN SPWS021B – OCTOBER 1995 – REVISED NOVEMBER 1996 20 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 timing requirements for management data I/O (MDIO) (see Figure 6) MIN MAX UNIT ta(MDCLKH-MDIOV) Access time, MDIO valid from MDCLK high (see Note 22) 0 300 ns switching characteristics for management data I/O (MDIO) (see Figure 3 and Figure 7) PARAMETER MIN MAX UNIT td(MDIOV-MDCLKH) Delay time, MDIO valid to MDCLK high (see Note 23) 10 ns td(MDCLKH-MDIOX) Delay time, MDCLK high to MDIO changing (see Note 23) 10 ns NOTES: 22. When the MDIO signal is sourced by the PMI /PHY, it is sampled by TNETE100A synchronous to the rising edge of MDCLK. 23. MDIO is a bidirectional signal that can be sourced by TNETE100A or the PMI /PHY. When TNETE100A sources the MDIO signal, TNETE100A asserts MDIO synchronous to the rising edge of MDCLK. ta(MDCLKH-MDIOV) MDCLK MDIO Figure 6. Management Data I/O Timing (Sourced by PHY) td(MDIOV-MDCLKH) td(MDCLKH-MDIOX) MDCLK MDIO Figure 7. Management Data I/O Timing (Sourced by TNETE100A) |
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