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STW82102B 数据表(PDF) 66 Page - STMicroelectronics |
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STW82102B 数据表(HTML) 66 Page - STMicroelectronics |
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66 / 67 page ![]() Revision history STW82102B 66/67 Doc ID 018516 Rev 2 29-Mar-2012 2 Section 9.3.2: I2C register definitions. Updated description of bitfield CALTYPE and MUTE_TYPE in registers MUTE_&_CALIBRATION Added Section 9.4.2: Power ON sequence (I2C interface) Section 12: Evaluation kit: – modified Figure 23: SPI timing waveforms – modified Table 20: SPI timing parameters minimum values of tclk_loadr and tclk_loadf. Section 10.3.2: SPI register definitions: updated – description of bitfields CALTYPE and MUTE_TYPE in register ST2 – description of bitfield PD[4:0] in register ST3 Added Section 10.4.2: Power ON sequence (SPI interface) Added Section 12: Evaluation kit. Table 25. Document revision history (continued) Date Revision Changes |
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