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WM8946ECS/R 数据表(PDF) 33 Page - Wolfson Microelectronics plc |
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WM8946ECS/R 数据表(HTML) 33 Page - Wolfson Microelectronics plc |
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33 / 175 page ![]() Production Data WM8946 w PD, July 2012, Rev 4.3 33 DSP CORE DSP Core is at the centre of the ADC / DAC / Digital Audio Interface (I2S) blocks. It provides signal routing, and also implements a number of configurable signal processing functions. The signal processing functions are arranged in three blocks, as follows: Signal Enhancement 1 (SE1) - Low-pass / High-pass filter, 3D-stereo enhancement, 5 notch filters, generic ‘Direct-Form 1’ filter. Signal Enhancement 2 (SE2) - ReTune™ processing, 5-band equalizer. Signal Enhancement 3 (SE3) - Dynamic range control The DSP Configuration modes and each of the Signal Enhancement blocks is described in the following sections. DSP CONFIGURATION MODES The DSP Configuration Mode is determined using the SE_CONFIG register field; this configures the signal paths between the Signal Enhancement blocks and the ADC / DAC / I2S interfaces. The supported DSP modes are illustrated in Figure 13. Figure 13 DSP Configuration Modes |
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