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WM8946ECS/R 数据表(PDF) 98 Page - Wolfson Microelectronics plc |
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WM8946ECS/R 数据表(HTML) 98 Page - Wolfson Microelectronics plc |
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98 / 175 page ![]() WM8946 Production Data w PD, July 2012, Rev 4.3 98 The sequence of signals associated with a single register read operation is illustrated in Figure 36. Figure 36 Control Interface 2-wire (I2C) Register Read The Control Interface also supports other register operations, as listed above. The interface protocol for these operations is summarised below. The terminology used in the following figures is detailed in Table 64. Note that, for multiple write and multiple read operations, the auto-increment option must be enabled. This feature is enabled by default, as noted in Table 63. TERMINOLOGY DESCRIPTION S Start Condition Sr Repeated start A Acknowledge P Stop Condition R/W ReadNotWrite 0 = Write 1 = Read [White field] Data flow from bus master to WM8946 [Grey field] Data flow from WM8946 to bus master Table 64 Control Interface Terminology Figure 37 Single Register Write to Specified Address Figure 38 Single Register Read from Specified Address |
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