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数据搜索系统，热门电子元器件搜索 |
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WM8980CGEFL/V 数据表(PDF) 96 Page - Wolfson Microelectronics plc |
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WM8980CGEFL/V 数据表(HTML) 96 Page - Wolfson Microelectronics plc |
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96 / 123 page  WM8980 Pre-Production w PP, Rev 3.8, May 2012 96 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION REFER TO 2 INPPGAENL 0 Left channel input PGA enable 0 = disabled 1 = enabled Power Management 1 ADCENR 0 Enable ADC right channel: 0 = ADC disabled 1 = ADC enabled Analogue to Digital Converter (ADC) 0 ADCENL 0 Enable ADC left channel: 0 = ADC disabled 1 = ADC enabled Analogue to Digital Converter (ADC) 3 (03h) 8 OUT4EN 0 OUT4 enable 0 = disabled 1 = enabled Power Management 7 OUT3EN 0 OUT3 enable 0 = disabled 1 = enabled Power Management 6 LOUT2EN 0 LOUT2 enable 0 = disabled 1 = enabled Power Management 5 ROUT2EN 0 ROUT2 enable 0 = disabled 1 = enabled Power Management 4 VBUFEN 0 Video buffer enable 0 = disabled 1 = enabled Video Buffer 3 RMIXEN 0 Right output channel mixer enable: 0 = disabled 1 = enabled Analogue Outputs 2 LMIXEN 0 Left output channel mixer enable: 0 = disabled 1 = enabled Analogue Outputs 1 DACENR 0 Right channel DAC enable 0 = DAC disabled 1 = DAC enabled Analogue Outputs 0 DACENL 0 Left channel DAC enable 0 = DAC disabled 1 = DAC enabled Analogue Outputs |
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