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WM8980CGEFL/V 数据表(PDF) 12 Page - Wolfson Microelectronics plc |
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WM8980CGEFL/V 数据表(HTML) 12 Page - Wolfson Microelectronics plc |
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12 / 123 page  WM8980 Pre-Production w PP, Rev 3.8, May 2012 12 POWER CONSUMPTION Typical current consumption for various scenarios is shown below. MODE AVDD (3.0V) (mA) DCVDD (1.9V) (mA) DBVDD 1 (3.0V) (mA) VBVDD (3.0V) (mA) TOTAL POWER (mW) Off 0.04 3 0.0008 <0.0001 0 0.12 Sleep (VREF maintained, no clocks) 0.04 0.0008 <0.0001 0 0.12 MIC Record (8kHz) 2 4.1 1.0 0.001 0 14.1 Stereo 16Ω HP Playback (48kHz, quiescent) 2 3.3 6.2 0.004 0 21.1 Stereo 16Ω HP Playback (48kHz, white noise) 2 5.4 7.3 0.004 0 29.4 Stereo 16Ω HP Playback (48kHz, sine wave) 2 18 6.7 0.004 0 66.1 Stereo 16Ω HP Playback (48kHz, sine wave) 2 video buffer enabled 18 6.7 0.004 4.0 78.1 Table 1 Power Consumption Notes: 1. DBVDD Current will increase with greater loading on digital I/O pins. 2. 5 Band EQ is enabled. 3. AVDD standby current will fall to nearer 15uA when thermal shutdown sensor is disabled. ESTIMATING SUPPLY CURRENT When either the DAC or ADC is enabled approximately 7mA will be drawn from DCVDD when DCVDD=1.8V and fs=48kHz. When the PLL is enabled approximately 1.5mA additional current will be drawn from DCVDD. The video buffer will draw approximately 4mA with no load attached. During normal operation up to 30mA will be drawn. As a general rule, digital supply currents will scale in proportion to sample rates. Supply current for analogue and digital blocks will also be lower at lower supply voltages. Power consumed by the output drivers will depend greatly on the signal characteristics. A quiet signal, or a signal with long periods of silence will consume less power than a signal which is continuously loud. |
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