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AD7002AS 数据表(PDF) 2 Page - Analog Devices |
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AD7002AS 数据表(HTML) 2 Page - Analog Devices |
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2 / 16 page  –2– REV. B AD7002–SPECIFICATIONS1 Parameter AD7002A Units Test Conditions/Comments ADC SPECIFICATIONS Resolution 12 Bits Rx SLEEP = 0 V, Tx SLEEP = VDD Signal Input Span ±V REF/2 Volts Biased on VREF (2.5 V) Sampling Rate 13 MSPS Output Word Rate 270.8 kHz RATE 0 541.7 kHz RATE 1 Accuracy Integral ±1 LSB typ Differential 2 0 Bias Offset Error ±6.5 LSB max After External Calibration; MZERO Low ±8 LSB typ After Internal Calibration; MZERO High Input Resistance (DC) 300 k Ω typ Input Capacitance 10 pF typ Dynamic Specifications Input Frequency = 67.7 kHz Dynamic Range 64 dB typ Signal to (Noise+Distortion) 62 dB min Gain Error ±0.5 dB max Input Frequency = 67.7 kHz, w.r.t. 2.5 V Gain Match Between Channels ±0.15 dB max Input Frequency = 67.7 kHz Filter Settling Time 47 µs typ Frequency Response 0 kHz–100 kHz ±0.05 dB max 110 kHz –0.8 dB max 122 kHz –3.0 dB max 200 kHz –66 dB max 400 kHz–6.5 MHz –72 dB max Absolute Group Delay 23 µs typ Group Delay Between Channels (0 kHz–120 kHz) 5 ns typ Coding Twos Complement Power-Down Option Yes Rx SLEEP = VDD, Independent of Transmit TRANSMIT DAC SPECIFICATIONS Resolution 10 Bits Rx SLEEP = VDD, Tx SLEEP = 0 V Number of Channels 2 Update Rate 4.33 MSPS 16 Oversampling of the Bit Rate DC Accuracy Integral ±0.7 LSB typ Differential ±1.0 LSB typ Output Signal Span ±V REF/2 Volts Centered on VREF Nominal (100 kΩ/20 pF Load) Output Signal Full-Scale Accuracy ±1 dB max w.r.t. 2.5 V Offset Error ±25 mV max 10 0000 0000 Loaded to DAC I Tx & Q Tx Gain Matching ±0.15 dB max Absolute Group Delay 10 µs typ Measured at 67.7 kHz Group Delay Linearity (0 kHz–120 kHz) 30 ns typ Each Channel, 10 kHz < FOUT < 100 kHz Phase Matching Between Channels 0.5 ° typ Generating 67.7 kHz Sine Waves GMSK Spectrum Mask 3 100 kHz –3 dB min 200 kHz –32 dB min 250 kHz –35 dB min 400 kHz –63 dB min 0.6 MHz –71 dB min 4.3 MHz –63 dB min 6.5 MHz –63 dB min GMSK Phase Trajectory Error 3 2 ° rms max 6 ° peak max Maximum Phase Effect Instance 3 9 µs typ Output Impedance I Tx 120 Ω typ Q Tx 120 Ω typ GMSK ROM Yes Contains GMSK Coding, Four-Bit Impulse Response Power-Down Option Yes Tx SLEEP = VDD, Independent of Receive (AVDD = +5 V 10%; DVDD = +5 V 10%; AGND = DGND = 0 V, fCLK1 = fCLK2 = 13 MHz; TA = TMIN to TMAX, Rx SLEEP1 = Rx SLEEP2 = Tx SLEEP = DVDD, unless otherwise noted) |
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